diff --git a/test/Makefile b/test/Makefile
index 317bb8b..74f291f 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -5,7 +5,7 @@
 SIM ?= icarus
 TOPLEVEL_LANG ?= verilog
 SRC_DIR = $(PWD)/../src
-PROJECT_SOURCES =  tt_um_waves.v
+PROJECT_SOURCES =  tt_um_waves.v sine_table.mem
 
 ifneq ($(GATES),yes)