Blackwell compile error: “Register allocation failed with register count of ‘7’” — where should I report?

[IlyaGrebnov]

Hi! I’m not sure if this belongs in the CCCL forum, but I’m looking for guidance / the right place to ask. I have CUDA code that compiles fine for Ampere and Ada, but fails when targeting Blackwell with: (C7600) Register allocation failed with register count of '7'. Compile the program with a higher register target.

This doesn’t look like real register pressure (the same code is <64 regs on Ampere/Ada), and even -maxrregcount=128 doesn’t help.

• Is this a known Blackwell nvcc/ptxas issue?
• If not CCCL-related, where’s the best place to report it (CUDA compiler / ptxas bug)?
• Any recommended flags or code patterns to try to “remove”/work around this?

I can share a repro + exact nvcc command line if helpful.

[IlyaGrebnov]

I narrowed this down further and it looks like a ptxas sm_120 optimization issue not real register pressure. If I compile for sm_89, everything is fine. If I take the same generated PTX and assemble it directly:

ptxas -v --gpu-name=sm_89 succeeds
ptxas -v --gpu-name=sm_120 fails with: ptxas fatal : (C7600) Register allocation failed with register count of '7'

This happens even though the PTX does not use .maxnreg. Workaround experiments on sm_120:

ptxas -v --gpu-name=sm_120 --opt-level 0 succeeds
ptxas -v --gpu-name=sm_120 -O1/-O2/-O3 fails (same C7600 / “7”)
ptxas -v --gpu-name=sm_120 -Ofast-compile=max succeeds
other -Ofast-compile levels fail

So for sm_120, it appears only -O0 or -Ofast-compile=max avoid the failure; anything else reliably triggers the failure with the suspicious “register count of 7”.

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[pauleonix]

If not CCCL-related, where’s the best place to report it (CUDA compiler / ptxas bug)?

See here for reporting non-CCCL bugs.