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fix: a gc bug causing slice get collected early than expected
1 parent d482884 commit 5136218

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2 files changed

+3
-3
lines changed

2 files changed

+3
-3
lines changed

src/ast/builder/llvmbuilder.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -594,7 +594,7 @@ impl<'a, 'ctx> LLVMBuilder<'a, 'ctx> {
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self.builder
595595
.build_memset(
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casted_result1,
597-
8,
597+
1,
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self.context.i8_type().const_zero(),
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arr_size,
600600
)
@@ -3553,7 +3553,7 @@ impl<'a, 'ctx> IRBuilder<'a, 'ctx> for LLVMBuilder<'a, 'ctx> {
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} else {
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to
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};
3556-
self.builder.build_memcpy(to, 8, from, 8, arg_len).unwrap();
3556+
self.builder.build_memcpy(to, 1, from, 1, arg_len).unwrap();
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}
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fn build_bit_not(&self, v: ValueHandle) -> ValueHandle {
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let v = self.get_llvm_value(v).unwrap();

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