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| 1 | +/* |
| 2 | + * Copyright (C) 2023 Mesotic SAS |
| 3 | + * |
| 4 | + * This file is subject to the terms and conditions of the GNU Lesser |
| 5 | + * General Public License v2.1. See the file LICENSE in the top level |
| 6 | + * directory for more details. |
| 7 | + */ |
| 8 | + |
| 9 | +/** |
| 10 | + * @ingroup boards_nrf5340dk-app |
| 11 | + * @{ |
| 12 | + * |
| 13 | + * @file |
| 14 | + * @brief Board configuration for the nRF5340DK-app board |
| 15 | + * |
| 16 | + * @author Dylan Laduranty <[email protected]> |
| 17 | + */ |
| 18 | + |
| 19 | +#ifndef BOARD_H |
| 20 | +#define BOARD_H |
| 21 | + |
| 22 | +#include "cpu.h" |
| 23 | + |
| 24 | +#ifdef __cplusplus |
| 25 | +extern "C" { |
| 26 | +#endif |
| 27 | + |
| 28 | +/** |
| 29 | + * @brief System core clock speed, for all NRF53 Application core. |
| 30 | + */ |
| 31 | +#define CLOCK_CORECLOCK MHZ(128) |
| 32 | + |
| 33 | +/** |
| 34 | + * @name HF Clock configuration |
| 35 | + * |
| 36 | + * |
| 37 | + * @{ |
| 38 | + */ |
| 39 | + |
| 40 | + /* CLOCK_HFCLKSRC_SRC_HFXO to use external 32MHz crystal |
| 41 | + * CLOCK_HFCLKSRC_SRC_HFINT to use internal crystal */ |
| 42 | +#define CLOCK_HFCLK (CLOCK_HFCLKSRC_SRC_HFXO) /**< HFCLK Source selection */ |
| 43 | +#define CLOCK_LFCLK (3) /**< LFCLK Source selection */ |
| 44 | +/** @} */ |
| 45 | + |
| 46 | +/** |
| 47 | + * @name LED pin configuration |
| 48 | + * @{ |
| 49 | + */ |
| 50 | +#define LED0_PIN GPIO_PIN(0, 28) /**< LED0 pin definition */ |
| 51 | +#define LED1_PIN GPIO_PIN(0, 29) /**< LED1 pin definition */ |
| 52 | +#define LED2_PIN GPIO_PIN(0, 30) /**< LED2 pin definition */ |
| 53 | +#define LED3_PIN GPIO_PIN(0, 31) /**< LED3 pin definition */ |
| 54 | + |
| 55 | +#define LED0_MASK (1 << 28) /**< LED0 PORT bitmask */ |
| 56 | +#define LED1_MASK (1 << 29) /**< LED1 PORT bitmask */ |
| 57 | +#define LED2_MASK (1 << 30) /**< LED2 PORT bitmask */ |
| 58 | +#define LED3_MASK (1 << 31) /**< LED3 PORT bitmask */ |
| 59 | + |
| 60 | +#define LED_PORT (NRF_P0_S) /**< Default LED PORT */ |
| 61 | + |
| 62 | +#define LED0_ON (LED_PORT->OUTCLR = LED0_MASK) /**< LED0 ON macro */ |
| 63 | +#define LED0_OFF (LED_PORT->OUTSET = LED0_MASK) /**< LED0 OFF macro */ |
| 64 | +#define LED0_TOGGLE (LED_PORT->OUT ^= LED0_MASK) /**< LED0 toggle macro */ |
| 65 | + |
| 66 | +#define LED1_ON (LED_PORT->OUTCLR = LED1_MASK) /**< LED1 ON macro */ |
| 67 | +#define LED1_OFF (LED_PORT->OUTSET = LED1_MASK) /**< LED1 OFF macro */ |
| 68 | +#define LED1_TOGGLE (LED_PORT->OUT ^= LED1_MASK) /**< LED1 toggle macro */ |
| 69 | + |
| 70 | +#define LED2_ON (LED_PORT->OUTCLR = LED2_MASK) /**< LED2 ON macro */ |
| 71 | +#define LED2_OFF (LED_PORT->OUTSET = LED2_MASK) /**< LED2 OFF macro */ |
| 72 | +#define LED2_TOGGLE (LED_PORT->OUT ^= LED2_MASK) /**< LED2 toggle macro */ |
| 73 | + |
| 74 | +#define LED3_ON (LED_PORT->OUTCLR = LED3_MASK) /**< LED3 ON macro */ |
| 75 | +#define LED3_OFF (LED_PORT->OUTSET = LED3_MASK) /**< LED3 OFF macro */ |
| 76 | +#define LED3_TOGGLE (LED_PORT->OUT ^= LED3_MASK) /**< LED3 toggle macro */ |
| 77 | +/** @} */ |
| 78 | + |
| 79 | +/** |
| 80 | + * @name Button pin configuration |
| 81 | + * @{ |
| 82 | + */ |
| 83 | +#define BTN0_PIN GPIO_PIN(0, 23) /**< BTN0 pin definition */ |
| 84 | +#define BTN0_MODE GPIO_IN_PU /**< BTN0 default mode */ |
| 85 | +#define BTN1_PIN GPIO_PIN(0, 24) /**< BTN1 pin definition */ |
| 86 | +#define BTN1_MODE GPIO_IN_PU /**< BTN1 default mode */ |
| 87 | +#define BTN2_PIN GPIO_PIN(0, 8) /**< BTN2 pin definition */ |
| 88 | +#define BTN2_MODE GPIO_IN_PU /**< BTN2 default mode */ |
| 89 | +#define BTN3_PIN GPIO_PIN(0, 9) /**< BTN3 pin definition */ |
| 90 | +#define BTN3_MODE GPIO_IN_PU /**< BTN3 default mode */ |
| 91 | +/** @} */ |
| 92 | + |
| 93 | +#ifdef __cplusplus |
| 94 | +} |
| 95 | +#endif |
| 96 | + |
| 97 | +#endif /* BOARD_H */ |
| 98 | +/** @} */ |
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