linux/arch/arm/boot/dts/xilinx/zynq-coraz7s-ad4052.dts at 13df15e250a913b1dcebd5e412b9c66e9dd9ce0d · analogdevicesinc/linux · GitHub

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// SPDX-License-Identifier: GPL-2.0
/*
 * Analog Devices AD4052
 *
 * hdl_project: <ad4052_ardz/coraz7s>
 *
 * Copyright (C) 2025 Analog Devices Inc.
 */

/dts-v1/;
#include "zynq-coraz7s.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	adc_vdd: regulator-vref-adc {
		compatible = "regulator-fixed";
		regulator-name = "adc-vdd";
		regulator-min-microvolt = <3600000>;
		regulator-max-microvolt = <3600000>;
		regulator-always-on;
	};

	adc_vio: regulator-vio-adc {
		compatible = "regulator-fixed";
		regulator-name = "adc_vio";
		regulator-min-microvolt = <3600000>;
		regulator-max-microvolt = <3600000>;
		regulator-always-on;
	};
};

&fpga_axi {
	axi_iic: i2c@41600000 {
		compatible = "xlnx,axi-iic-1.01.b", "xlnx,xps-iic-2.00.a";
		reg = <0x41600000 0x10000>;
		interrupt-parent = <&intc>;
		interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clkc 15>;
		clock-names = "s_axi_aclk";

		#size-cells = <0>;
		#address-cells = <1>;

		eeprom1: eeprom@52 {
			compatible = "atmel,24c32";
			reg = <0x52>;
		};

	};

	rx_dma: rx-dmac@44a30000 {
		compatible = "adi,axi-dmac-1.00.a";
		reg = <0x44a30000 0x1000>;
		#dma-cells = <1>;
		interrupt-parent = <&intc>;
		interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clkc 15>;
	};

	spi_clk: axi-clkgen@44a70000 {
		compatible = "adi,axi-clkgen-2.00.a";
		reg = <0x44a70000 0x10000>;
		#clock-cells = <0>;
		clocks = <&clkc 15>, <&clkc 15>;
		clock-names = "s_axi_aclk", "clkin1";
		clock-output-names = "spi_clk";
	};

	adc_trigger: pwm@44b00000 {
		compatible = "adi,axi-pwmgen-2.00.a";
		reg = <0x44b00000 0x1000>;
		#pwm-cells = <2>;
		clocks = <&spi_clk>;
	};

	axi_spi_engine: spi@44a00000 {
		compatible = "adi,axi-spi-engine-1.00.a";
		reg = <0x44a00000 0x1FF>;
		interrupt-parent = <&intc>;
		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clkc 15>, <&spi_clk>;
		clock-names = "s_axi_aclk", "spi_clk";

		dmas = <&rx_dma 0>;
		dma-names = "offload0-rx";
		trigger-sources = <&ad4052>;

		#address-cells = <0x1>;
		#size-cells = <0x0>;

		ad4052: ad4052@0 {
			compatible = "adi,ad4052";
			reg = <0>;
			vdd-supply = <&adc_vdd>;
			vio-supply = <&adc_vio>;
			spi-max-frequency = <31250000>;

			#trigger-source-cells = <0>;
			pwms = <&adc_trigger 0 10000 0>;

			interrupt-parent = <&gpio0>;
			interrupts = <86 IRQ_TYPE_EDGE_RISING>,
				     <87 IRQ_TYPE_EDGE_FALLING>;
			interrupt-names = "gp0", "gp1";
			cnv-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH>;
		};
	};
};