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project:ad719x: Added README documentation for AD719X
Added the README file for the AD719X project. Modified the sphinx project_doc.rst file to add the corresponding source. Signed-off-by: Carl Ian Gamutan <[email protected]>
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‎doc/sphinx/source/projects/adc/ad719x.rst‎

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.. include:: ../../../../../projects/ad719x/README.rst

‎projects/ad719x/README.rst‎

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AD719X no-OS Example Project
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============================
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.. contents::
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:depth: 3
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Supported Evaluation Boards
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---------------------------
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- :adi:`EVAL-AD7190ASDZ`
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Overview
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--------
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The EVAL-AD7190ASDZ evaluation kit features the AD7190 which is 4.8 kHz
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ultralow noise 24-bit sigma-delta (Σ-Δ) ADCs. The on-chip low noise gain
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stage means that signals of small amplitude can interface directly to
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the ADC. The internal clock option provides a compact solution for low
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BW requirements.
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Applications
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-------------
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- Weigh scales
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- Strain gauge transducers
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- Pressure measurement
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- Temperature measurement
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- Chromatography
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- PLC/DCS analog input modules
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- Data acquisition
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- Medical and scientific instrumentation
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Hardware Specifications
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-----------------------
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Power Supply Requirements
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~~~~~~~~~~~~~~~~~~~~~~~~~
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The EVAL-AD7190ASDZ evaluation board, centered around the AD7190 24-bit
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sigma-delta ADC, requires a stable power supply to maintain precision.
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The ADC operates on an analog supply voltage (AVDD) between 4.75V and
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5.25V, and a digital supply voltage (DVDD) ranging from 2.7V to 5.25V,
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consuming about 6 mA.
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Connectors
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~~~~~~~~~~
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+-----------------------+-----------------------+-----------------------+
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| Connector Type | Function/Connection | Details |
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+-----------------------+-----------------------+-----------------------+
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| 120-pin Connector | Connection to | Allows connection to |
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| | Controller Board | EVAL-SDP-CKIZ / |
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| | | EVAL-SDP-CB1Z |
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+-----------------------+-----------------------+-----------------------+
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| Arduino Connectors | Alternative | Provides a secondary |
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| | connection method | connection option for |
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| | | specific use cases |
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+-----------------------+-----------------------+-----------------------+
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| AGND, AVDD, DGND, | Power and Ground | Ensures proper power |
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| REF(+) | Connections | supply and reference |
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| | | to the AD7190 |
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+-----------------------+-----------------------+-----------------------+
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| P0/REFIN2, P1/REFIN1 | Reference | Used for external |
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| | Inputs/Outputs | reference setup |
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+-----------------------+-----------------------+-----------------------+
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| MUX | Signal Routing | Directs signals to |
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| | | the ADC |
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+-----------------------+-----------------------+-----------------------+
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| Digital Logic | Includes Serial | For control logic, |
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| Connections | Interface | facilitating data |
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| | | communication |
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+-----------------------+-----------------------+-----------------------+
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| Temp Sensor | Temperature | Monitors board |
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| | Measurement | temperature for |
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| | | operational stability |
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+-----------------------+-----------------------+-----------------------+
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| Clock Circuitry | Timing Inputs | Manages timing |
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| | | signals for ADC |
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| | | operations |
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+-----------------------+-----------------------+-----------------------+
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No-OS Build Setup
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-----------------
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Please see: `https://wiki.analog.com/resources/no-os/build`
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No-OS Supported Examples
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------------------------
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The initialization data used in the examples is taken out from the
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`Project Common Data Path <https://github.com/analogdevicesinc/no-OS/tree/main/projects/ad719x/src/common>`__.
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The macros used in Common Data are defined in platform specific files
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found in:
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`Project Platform Configuration Path <https://github.com/analogdevicesinc/no-OS/tree/main/projects/ad719x/src/platform>`__.
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Dummy example
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~~~~~~~~~~~~~~
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The ``dummy example`` in the EVAL-AD7190ASDZ evaluation kit documentation
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demonstrates the initial setup for the AD7190 ADC by providing essential
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operations without application-specific extensions. It initializes the
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AD7190, reads temperature data through the ``ad719x_temperature_read``
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function, and continuously averages 100 samples from the ADC to
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calculate a mean voltage. The temperature and average voltage are then
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displayed to validate basic ADC functionality. Configuration is managed
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through build files, specifically enabling the dummy example via flags
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for hardware testing purposes.
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In order to build the example, make sure you have the following
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configuration in the Makefile:
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.. code-block:: bash
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DUMMY_EXAMPLE=y
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No-OS Supported Platforms
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-------------------------
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Xilinx
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~~~~~~~
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Hardware Used
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^^^^^^^^^^^^^
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- EVAL-AD7190ASDZ
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- ZedBoard
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Connections
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^^^^^^^^^^^
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Connect the SPI lines of the EVAL-AD7190ASDZ to the ZedBoard’s PMOD
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header using jumper wires while observing the following connections to
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ensure signal integrity and voltage compatibility given the ZedBoard
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operates at a 3.3V logic level.
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+-----------------------+-----------------------+-----------------------+
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| AD7190 Signal | ZedBoard | Notes / Requirements |
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+-----------------------+-----------------------+-----------------------+
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| **CS** | A GPIO or SPI_CSn | Active low; drive it |
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| | line | low for the AD7190 |
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| | | before transaction |
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+-----------------------+-----------------------+-----------------------+
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| **SCLK** | SPI clock line | Make sure rise/fall |
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| | | times, duty cycle are |
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| | | within spec |
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+-----------------------+-----------------------+-----------------------+
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| **SDI / MOSI** | SPI Master → AD7190 | Data from Zynq to |
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| | SDI | AD7190 |
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+-----------------------+-----------------------+-----------------------+
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| **SDO / MISO (or RDY | AD7190 → SPI master / | Data from AD7190 |
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| + data)** | FPGA input | |
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+-----------------------+-----------------------+-----------------------+
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| **DVDD / IOVDD / AVDD | Provide power and | Match I/O voltages |
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| or GND** | ground | likely 3.3V; ensure |
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| | | stable, clean |
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| | | supplies |
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+-----------------------+-----------------------+-----------------------+
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| **Reference inputs | If external reference | May need wires to |
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| (REFIN)** | used | your reference |
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| | | generator |
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+-----------------------+-----------------------+-----------------------+
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| **DRDY / RDY pin** | (Optional) interrupt | Useful to know when |
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| | line to Zynq | conversion is ready |
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+-----------------------+-----------------------+-----------------------+
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Build Command
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^^^^^^^^^^^^^
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.. code-block:: bash
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cp <SOME_PATH>/system_top.xsa .
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# to delete current build
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make reset
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# to build the project
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make
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# to flash the code
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make run

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