[FEATURE] Support for Arm FPU Lazy Stacking

[964849768qq]

Is your feature request related to a problem? Please describe.

Description

Currently, NuttX saves/restores all FPU registers during every context switch, even when tasks don't use the FPU. This adds unnecessary overhead. Modern Cortex-M processors support FPU Lazy Stacking, which delays FPU register preservation until actual FPU usage is detected.

Problem

When FPU is enabled, each context switch saves 17 additional FPU registers (S0-S15 + FPSCR), adding ~100 bytes of stack usage and increasing switch time. This is inefficient for tasks that don't use floating-point operations.
Hardware Support

Cortex-M4/M7/M33/M55/M85 processors already support Lazy Stacking via:

1. FPCCR.LSPENbit to enable/disable lazy stacking
2. FPCCR.LSPACTbit indicating pending lazy save
3. Automatic detection of FPU instruction usage

Proposed Implementation

• Configuration Option: Add CONFIG_ARCH_FPU_LAZYSTACKINGto enable/disable
• FPU Context Management:

1. Only allocate FPU save area when task actually uses FPU
2. Set CONTROL.FPCA=0initially for all tasks
3. Enable FPCCR.LSPENduring system initialization

Exception Handling:

• Monitor UFSR.LSPACT flag for pending lazy saves
• Handle automatic FPU stacking in UsageFault

Task Creation:

• Mark tasks as "FPU-unused" by default
• Update flag on first FPU instruction

Benefits

• Reduced context switch time​ for non-FPU tasks
• Lower stack memory usage​ (no FPU save area until needed)
• Better real-time performance​ for interrupt handlers
• Compatibility​ with existing code (transparent to applications)

Describe the solution you'd like

Official support for lazy stacking

Describe alternatives you've considered

No response

Verification

• I have verified before submitting the report.

[raiden00pl]

Lazy FPU for arm was supported long time ago and was removed here #6073
You can ask the authors for details