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[libc] Adds AMDGPU gfx941 and gfx942 to archs (#76573)
This adds the ROCm device libs defines for both target architectures so that we an compile libc on such GPUs.
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3 files changed

+10
-4
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3 files changed

+10
-4
lines changed

libc/cmake/modules/prepare_libc_gpu_build.cmake

+3-2
Original file line numberDiff line numberDiff line change
@@ -5,8 +5,9 @@ endif()
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# Set up the target architectures to build the GPU libc for.
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set(all_amdgpu_architectures "gfx700;gfx701;gfx801;gfx803;gfx900;gfx902;gfx906"
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"gfx908;gfx90a;gfx90c;gfx940;gfx1010;gfx1030"
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"gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
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"gfx908;gfx90a;gfx90c;gfx940;gfx941;gfx942"
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"gfx1010;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034"
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"gfx1035;gfx1036"
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"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151")
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set(all_nvptx_architectures "sm_35;sm_37;sm_50;sm_52;sm_53;sm_60;sm_61;sm_62"
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"sm_70;sm_72;sm_75;sm_80;sm_86;sm_89;sm_90")

libc/src/math/gpu/vendor/amdgpu/platform.h

+4
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,10 @@ extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9010;
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extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9012;
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#elif defined(__gfx940__)
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extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9400;
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#elif defined(__gfx941__)
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extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9401;
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#elif defined(__gfx942__)
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extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9402;
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#elif defined(__gfx1010__)
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extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 10100;
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#elif defined(__gfx1011__)

libc/src/time/gpu/time_utils.h

+3-2
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,8 @@ namespace LIBC_NAMESPACE {
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// AMDGPU does not have a single set frequency. Different architectures and
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// cards can have vary values. Here we default to a few known values, but for
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// complete support the frequency needs to be read from the kernel driver.
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#if defined(__gfx1010__) || defined(__gfx1011__) || defined(__gfx1012__) || \
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#if defined(__gfx940__) || defined(__gfx941__) || defined(__gfx942__) || \
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defined(__gfx1010__) || defined(__gfx1011__) || defined(__gfx1012__) || \
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defined(__gfx1013__) || defined(__gfx1030__) || defined(__gfx1031__) || \
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defined(__gfx1032__) || defined(__gfx1033__) || defined(__gfx1034__) || \
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defined(__gfx1035__) || defined(__gfx1036__) || defined(__gfx1100__) || \
@@ -27,7 +28,7 @@ namespace LIBC_NAMESPACE {
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constexpr uint64_t clock_freq = 100000000;
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#elif defined(__gfx900__) || defined(__gfx902__) || defined(__gfx904__) || \
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defined(__gfx906__) || defined(__gfx908__) || defined(__gfx909__) || \
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defined(__gfx90a__) || defined(__gfx90c__) || defined(__gfx940__)
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defined(__gfx90a__) || defined(__gfx90c__)
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// These architectures use a 25 MHz fixed frequency clock expect for Vega 10
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// which is actually 27 Mhz. We default to 25 MHz in all cases anyway.
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constexpr uint64_t clock_freq = 25000000;

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