File tree 3 files changed +10
-4
lines changed
3 files changed +10
-4
lines changed Original file line number Diff line number Diff line change 5
5
6
6
# Set up the target architectures to build the GPU libc for.
7
7
set (all_amdgpu_architectures "gfx700;gfx701;gfx801;gfx803;gfx900;gfx902;gfx906"
8
- "gfx908;gfx90a;gfx90c;gfx940;gfx1010;gfx1030"
9
- "gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
8
+ "gfx908;gfx90a;gfx90c;gfx940;gfx941;gfx942"
9
+ "gfx1010;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034"
10
+ "gfx1035;gfx1036"
10
11
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151" )
11
12
set (all_nvptx_architectures "sm_35;sm_37;sm_50;sm_52;sm_53;sm_60;sm_61;sm_62"
12
13
"sm_70;sm_72;sm_75;sm_80;sm_86;sm_89;sm_90" )
Original file line number Diff line number Diff line change @@ -72,6 +72,10 @@ extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9010;
72
72
extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9012 ;
73
73
#elif defined(__gfx940__)
74
74
extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9400 ;
75
+ #elif defined(__gfx941__)
76
+ extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9401 ;
77
+ #elif defined(__gfx942__)
78
+ extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 9402 ;
75
79
#elif defined(__gfx1010__)
76
80
extern const LIBC_INLINE_VAR uint32_t __oclc_ISA_version = 10100 ;
77
81
#elif defined(__gfx1011__)
Original file line number Diff line number Diff line change @@ -17,7 +17,8 @@ namespace LIBC_NAMESPACE {
17
17
// AMDGPU does not have a single set frequency. Different architectures and
18
18
// cards can have vary values. Here we default to a few known values, but for
19
19
// complete support the frequency needs to be read from the kernel driver.
20
- #if defined(__gfx1010__) || defined(__gfx1011__) || defined(__gfx1012__) || \
20
+ #if defined(__gfx940__) || defined(__gfx941__) || defined(__gfx942__) || \
21
+ defined (__gfx1010__) || defined(__gfx1011__) || defined(__gfx1012__) || \
21
22
defined(__gfx1013__) || defined(__gfx1030__) || defined(__gfx1031__) || \
22
23
defined(__gfx1032__) || defined(__gfx1033__) || defined(__gfx1034__) || \
23
24
defined(__gfx1035__) || defined(__gfx1036__) || defined(__gfx1100__) || \
@@ -27,7 +28,7 @@ namespace LIBC_NAMESPACE {
27
28
constexpr uint64_t clock_freq = 100000000;
28
29
#elif defined(__gfx900__) || defined(__gfx902__) || defined(__gfx904__) || \
29
30
defined (__gfx906__) || defined(__gfx908__) || defined(__gfx909__) || \
30
- defined(__gfx90a__) || defined(__gfx90c__) || defined(__gfx940__)
31
+ defined(__gfx90a__) || defined(__gfx90c__)
31
32
// These architectures use a 25 MHz fixed frequency clock expect for Vega 10
32
33
// which is actually 27 Mhz. We default to 25 MHz in all cases anyway.
33
34
constexpr uint64_t clock_freq = 25000000;
You can’t perform that action at this time.
0 commit comments