[Chapter 13] Fixed the MUL.4H and MLA.4H syntax

Author: below

Chapter 13/debug.s

@@ -33,15 +33,15 @@ main:
 	LDP	D3, D4, [X0], #16
 	LDR	D5, [X0]
 
-	MUL	V6().4H, V0.4H, V3().4H[0]
-	MLA	V6().4H, V1.4H, V3().4H[1]
-	MLA	V6().4H, V2.4H, V3().4H[2]
-	MUL	V7().4H, V0.4H, V4().4H
-	MLA	V7().4H, V1.4H, V4().4H
-	MLA	V7().4H, V2.4H, V4().4H
-	MUL	V8().4H, V0.4H, V5().4H
-	MLA	V8().4H, V1.4H, V5().4H
-	MLA	V8().4H, V2.4H, V5().4H
+.macro mulcol ccol bcol
+	MUL.4H	\ccol\(), V0, \bcol\()[0]
+	MLA.4H	\ccol\(), V1, \bcol\()[1]
+	MLA.4H	\ccol\(), V2, \bcol\()[2]
+.endm
+
+	mulcol	V6, V3	// process first column
+	mulcol	V7, V4	// process second column
+	mulcol	V8, V5	// process third column
 
 	ADRP	X1, C@PAGE	// Address of C
 	ADD	X1, X1, C@PAGEOFF

Chapter 13/matrixmultneon.s

@@ -7,11 +7,13 @@ In this repository, I will code along with the book [Programming with 64-Bit ARM
 
 ## Latest News
 
+Pop the Champagne! 🍾 All the code is running!
+
 Once you found the bug, you feel stupid for not noticing it before. Only after some debugging I realized that Darwin has a different value for `AT_FDCWD`. This means: Chapter 7 is ready!
 
-Chapter 13 stil has an open issue, though.
+And after some disassembly and reading [Documentation](https://community.arm.com/developer/tools-software/oss-platforms/b/android-blog/posts/arm-neon-programming-quick-reference), Chapter 13 is ready as well.
 
-I got a mention in Stephen Smith's [blog](https://smist08.wordpress.com/2020/07/31/is-apple-silicon-really-arm/)!
+Last but not least, I got a mention in Stephen Smith's [blog](https://smist08.wordpress.com/2020/07/31/is-apple-silicon-really-arm/)!
 
 ### Prerequisites
 
@@ -283,7 +285,19 @@ Like in Chapter 11, all the chages have been introduced already. Nothing new her
 
 ## Chapter 13
 
-This chapter is still in the works; it compiles, but the output is wrong. There is one [issue](https://github.com/below/HelloSilicon/issues/15) I'd like to fix
+Once again, the Clang assembler seems to want a slightly different syntax: Where gcc accepts
+
+```
+MUL V6.4H, V0.4H, V3.4H[0]
+```
+
+the Clang assembler expects
+
+```
+MUL.4H V6, V0, V3[0]
+```
+
+All other changes to the code should be trivial at this point.
 
 ## Chapter 14