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GroupProject.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
# Date created = 20:55:11 July 11, 2021
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# GroupProject_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CSEMA5F31C6
set_global_assignment -name TOP_LEVEL_ENTITY clockDivider
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:55:11 JULY 11, 2021"
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVCMOS"
set_location_assignment PIN_AF14 -to clk
set_global_assignment -name VERILOG_FILE clockDivider.v
set_global_assignment -name VERILOG_FILE fpgaDriver.v
set_global_assignment -name ENABLE_CONFIGURATION_PINS ON
set_global_assignment -name ENABLE_NCE_PIN ON
set_global_assignment -name ENABLE_BOOT_SEL_PIN ON
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name CRC_ERROR_OPEN_DRAIN ON
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHZ
set_location_assignment PIN_AA14 -to button0
set_location_assignment PIN_AA15 -to button1
set_location_assignment PIN_W15 -to button2
set_location_assignment PIN_Y16 -to button3
set_location_assignment PIN_V16 -to led0
set_location_assignment PIN_W16 -to led1
set_location_assignment PIN_V17 -to led2
set_location_assignment PIN_V18 -to led3
set_location_assignment PIN_AB12 -to switch0
set_location_assignment PIN_AC12 -to switch1
set_location_assignment PIN_AF9 -to switch2
set_location_assignment PIN_W17 -to led4
set_location_assignment PIN_W19 -to led5
set_location_assignment PIN_Y19 -to led6
set_location_assignment PIN_W20 -to led7
set_location_assignment PIN_W21 -to led8
set_location_assignment PIN_Y21 -to led9
set_location_assignment PIN_AD10 -to switch8
set_location_assignment PIN_AE12 -to switch9
set_global_assignment -name CDF_FILE output_files/GroupProject.cdf
set_location_assignment PIN_AH28 -to hex0[6]
set_location_assignment PIN_AG28 -to hex0[5]
set_location_assignment PIN_AF28 -to hex0[4]
set_location_assignment PIN_AG27 -to hex0[3]
set_location_assignment PIN_AE28 -to hex0[2]
set_location_assignment PIN_AE27 -to hex0[1]
set_location_assignment PIN_AE26 -to hex0[0]
set_location_assignment PIN_AD27 -to hex1[6]
set_location_assignment PIN_AF30 -to hex1[5]
set_location_assignment PIN_AF29 -to hex1[4]
set_location_assignment PIN_AG30 -to hex1[3]
set_location_assignment PIN_AH30 -to hex1[2]
set_location_assignment PIN_AH29 -to hex1[1]
set_location_assignment PIN_AJ29 -to hex1[0]
set_location_assignment PIN_AC30 -to hex2[6]
set_location_assignment PIN_AC29 -to hex2[5]
set_location_assignment PIN_AD30 -to hex2[4]
set_location_assignment PIN_AC28 -to hex2[3]
set_location_assignment PIN_AD29 -to hex2[2]
set_location_assignment PIN_AE29 -to hex2[1]
set_location_assignment PIN_AB23 -to hex2[0]
set_location_assignment PIN_AB22 -to hex3[6]
set_location_assignment PIN_AB25 -to hex3[5]
set_location_assignment PIN_AB28 -to hex3[4]
set_location_assignment PIN_AC25 -to hex3[3]
set_location_assignment PIN_AD25 -to hex3[2]
set_location_assignment PIN_AC27 -to hex3[1]
set_location_assignment PIN_AD26 -to hex3[0]
set_location_assignment PIN_W25 -to hex4[6]
set_location_assignment PIN_V23 -to hex4[5]
set_location_assignment PIN_W24 -to hex4[4]
set_location_assignment PIN_W22 -to hex4[3]
set_location_assignment PIN_Y24 -to hex4[2]
set_location_assignment PIN_Y23 -to hex4[1]
set_location_assignment PIN_AA24 -to hex4[0]
set_location_assignment PIN_AA25 -to hex5[6]
set_location_assignment PIN_AA26 -to hex5[5]
set_location_assignment PIN_AB26 -to hex5[4]
set_location_assignment PIN_AB27 -to hex5[3]
set_location_assignment PIN_Y27 -to hex5[2]
set_location_assignment PIN_AA28 -to hex5[1]
set_location_assignment PIN_V25 -to hex5[0]
set_global_assignment -name VERILOG_FILE sevenSegmentDriver.v
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top