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[ARM] Emit an error when the hard-float ABI is enabled but can't be used.
Currently, compiling for an eabihf target with a CPU lacking floating-point registers will silently use the soft-float ABI instead, even though the Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which leads to silent ABI mismatches at link time. Update all ARM tests that were using an affected combination to enable the necessary FPU features or use a soft-float ABI. [clang] Remove the warning from clang that detected this case only if -mfloat-abi=hard or -mhard-float were specified explicitly. Fixes llvm#110383.
1 parent cbc7812 commit 4bd5ec3

21 files changed

+74
-99
lines changed

‎clang/include/clang/Basic/DiagnosticDriverKinds.td

-3
Original file line numberDiff line numberDiff line change
@@ -459,9 +459,6 @@ def warn_drv_assuming_mfloat_abi_is : Warning<
459459
def warn_drv_unsupported_float_abi_by_lib : Warning<
460460
"float ABI '%0' is not supported by current library">,
461461
InGroup<UnsupportedABI>;
462-
def warn_drv_no_floating_point_registers: Warning<
463-
"'%0': selected processor lacks floating point registers">,
464-
InGroup<UnsupportedABI>;
465462
def warn_ignoring_ftabstop_value : Warning<
466463
"ignoring invalid -ftabstop value '%0', using default value %1">;
467464
def warn_drv_overriding_option : Warning<

‎clang/lib/Driver/ToolChains/Arch/ARM.cpp

-18
Original file line numberDiff line numberDiff line change
@@ -158,22 +158,6 @@ static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
158158
<< A->getSpelling() << A->getValue();
159159
}
160160

161-
// If -mfloat-abi=hard or -mhard-float are specified explicitly then check that
162-
// floating point registers are available on the target CPU.
163-
static void checkARMFloatABI(const Driver &D, const ArgList &Args,
164-
bool HasFPRegs) {
165-
if (HasFPRegs)
166-
return;
167-
const Arg *A =
168-
Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
169-
options::OPT_mfloat_abi_EQ);
170-
if (A && (A->getOption().matches(options::OPT_mhard_float) ||
171-
(A->getOption().matches(options::OPT_mfloat_abi_EQ) &&
172-
A->getValue() == StringRef("hard"))))
173-
D.Diag(clang::diag::warn_drv_no_floating_point_registers)
174-
<< A->getAsString(Args);
175-
}
176-
177161
bool arm::useAAPCSForMachO(const llvm::Triple &T) {
178162
// The backend is hardwired to assume AAPCS for M-class processors, ensure
179163
// the frontend matches that.
@@ -985,8 +969,6 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver &D,
985969
if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
986970
Features.push_back("+no-bti-at-return-twice");
987971

988-
checkARMFloatABI(D, Args, HasFPRegs);
989-
990972
return FPUKind;
991973
}
992974

‎clang/test/Driver/arm-float-abi-lto.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44

55
// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s -flto=full -c -o %t.call_full.bc -DCALL_LIB
66
// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s -flto=full -c -o %t.define_full.bc -DDEFINE_LIB
7-
// RUN: llvm-lto2 run -o %t.lto_full -save-temps %t.call_full.bc %t.define_full.bc \
7+
// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_full -save-temps %t.call_full.bc %t.define_full.bc \
88
// RUN: -r %t.call_full.bc,fn,px \
99
// RUN: -r %t.call_full.bc,fwrite,l \
1010
// RUN: -r %t.call_full.bc,putchar,l \
@@ -16,7 +16,7 @@
1616

1717
// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s -flto=thin -c -o %t.call_thin.bc -DCALL_LIB
1818
// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s -flto=thin -c -o %t.define_thin.bc -DDEFINE_LIB
19-
// RUN: llvm-lto2 run -o %t.lto_thin -save-temps %t.call_thin.bc %t.define_thin.bc \
19+
// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_thin -save-temps %t.call_thin.bc %t.define_thin.bc \
2020
// RUN: -r %t.call_thin.bc,fn,px \
2121
// RUN: -r %t.call_thin.bc,fwrite,l \
2222
// RUN: -r %t.call_thin.bc,putchar,l \

‎clang/test/Driver/arm-no-float-regs.c

-22
This file was deleted.

‎llvm/lib/Target/ARM/ARMTargetMachine.cpp

+5-1
Original file line numberDiff line numberDiff line change
@@ -311,11 +311,15 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
311311
// function that reside in TargetOptions.
312312
resetTargetOptions(F);
313313
I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle,
314-
F.hasMinSize());
314+
F.hasMinSize());
315315

316316
if (!I->isThumb() && !I->hasARMOps())
317317
F.getContext().emitError("Function '" + F.getName() + "' uses ARM "
318318
"instructions, but the target does not support ARM mode execution.");
319+
320+
if (I->isTargetHardFloat() && !I->hasFPRegs())
321+
F.getContext().emitError("The hard-float ABI is enabled, but the target "
322+
"lacks floating-point registers.");
319323
}
320324

321325
return I.get();

‎llvm/test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
;PR15293: ARM codegen ice - expected larger existing stack allocation
2-
;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
2+
;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
33

44
;CHECK-LABEL: foo:
55
;CHECK: sub sp, sp, #16

‎llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
;PR15293: ARM codegen ice - expected larger existing stack allocation
2-
;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
2+
;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
33

44
%struct.S227 = type { [49 x i32], i32 }
55

‎llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding2.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
;PR15293: ARM codegen ice - expected larger existing stack allocation
2-
;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
2+
;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
33

44
%struct4bytes = type { i32 }
55
%struct20bytes = type { i32, i32, i32, i32, i32 }

‎llvm/test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
1+
; RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
22

33
%struct4bytes = type { i32 }
44
%struct8bytes8align = type { i64 }

‎llvm/test/CodeGen/ARM/arm-eabi.ll

+12-12
Original file line numberDiff line numberDiff line change
@@ -1,31 +1,31 @@
11
; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
2-
; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
2+
; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
33
; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
44
; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
5-
; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
5+
; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
66
; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
7-
; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
7+
; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
88
; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
9-
; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
9+
; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
1010
; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
1111
; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
12-
; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
12+
; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
1313
; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
14-
; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
14+
; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
1515
; RUN: llc < %s -mtriple=arm-none-eabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
16-
; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
16+
; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
1717
; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
1818
; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
19-
; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
19+
; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
2020
; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
21-
; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
21+
; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
2222
; RUN: llc < %s -mtriple=arm-none-eabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
23-
; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
23+
; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
2424
; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
2525
; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
26-
; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
26+
; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
2727
; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
28-
; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
28+
; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
2929

3030
%struct.my_s = type { [18 x i32] }
3131

‎llvm/test/CodeGen/ARM/block-order.mir

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
2-
# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabihf -run-pass=block-placement -verify-machineinstrs | FileCheck %s
3-
# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabihf -run-pass=block-placement -force-loop-cold-block -verify-machineinstrs | FileCheck %s
2+
# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabi -run-pass=block-placement -verify-machineinstrs | FileCheck %s
3+
# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabi -run-pass=block-placement -force-loop-cold-block -verify-machineinstrs | FileCheck %s
44
---
55
name: fn
66
tracksRegLiveness: true

‎llvm/test/CodeGen/ARM/constantpool-promote.ll

+12-12
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,15 @@
1-
; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-STATIC
2-
; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-PIC
3-
; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
4-
; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
5-
; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
6-
; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
7-
; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
8-
; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
9-
; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
10-
; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
11-
; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
12-
; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
1+
; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-STATIC
2+
; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-PIC
3+
; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
4+
; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
5+
; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
6+
; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
7+
; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
8+
; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
9+
; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
10+
; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
11+
; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
12+
; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
1313

1414
@.str = private unnamed_addr constant [2 x i8] c"s\00", align 1
1515
@.str1 = private unnamed_addr constant [69 x i8] c"this string is far too long to fit in a literal pool by far and away\00", align 1

‎llvm/test/CodeGen/ARM/eabihf-no-float-regs.ll

+15
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
; RUN: llc -asm-verbose=false --mtriple=armv7-none-eabihf --mattr=+vfp3 < %s | FileCheck %s --check-prefix=CHECK-VFP
2+
; RUN: llc -asm-verbose=false --mtriple=armv7-none-eabi --mattr=-fpregs < %s | FileCheck %s -check-prefix=CHECK-NOVFP
3+
; RUN: not llc -asm-verbose=false --mtriple=armv7-none-eabihf --mattr=-fpregs < %s 2>&1 | FileCheck %s -check-prefix=CHECK-ERROR -check-prefix=CHECK-NOVFP
4+
5+
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
6+
7+
; CHECK-VFP: vadd.f32
8+
; CHECK-ERROR: error: The hard-float ABI is enabled, but the target lacks floating-point registers.
9+
; CHECK-NOVFP: bl __aeabi_fadd
10+
define float @test_fadd(float %a, float %b) #0 {
11+
%r = fadd float %a, %b
12+
ret float %r
13+
}
14+
15+
attributes #0 = { nounwind }

‎llvm/test/CodeGen/ARM/fp16-promote.ll

+3-4
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,8 @@
1-
; RUN: llc -asm-verbose=false < %s -mattr=+vfp3,+fp16 | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-FP16 --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
2-
; RUN: llc -asm-verbose=false < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-LIBCALL --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL --check-prefix=CHECK-LIBCALL-VFP
3-
; RUN: llc -asm-verbose=false < %s -mattr=-fpregs | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK-LIBCALL -check-prefix=CHECK-NOVFP -check-prefix=CHECK-ALL
1+
; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabihf --mattr=+vfp3,+fp16 | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-FP16 --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
2+
; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabihf | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-LIBCALL --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL --check-prefix=CHECK-LIBCALL-VFP
3+
; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabi --mattr=-fpregs | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK-LIBCALL -check-prefix=CHECK-NOVFP -check-prefix=CHECK-ALL
44

55
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
6-
target triple = "armv7---eabihf"
76

87
; CHECK-ALL-LABEL: test_fadd:
98
; CHECK-FP16: vcvtb.f32.f16

‎llvm/test/CodeGen/ARM/macho-extern-hidden.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc < %s -mtriple=thumbv7em-apple-unknown-macho | FileCheck %s
1+
; RUN: llc < %s -mtriple=thumbv7-apple-unknown-macho | FileCheck %s
22

33
; CHECK: movw r0, :lower16:(L_bar$non_lazy_ptr-(LPC0_0+4))
44
; CHECK: movt r0, :upper16:(L_bar$non_lazy_ptr-(LPC0_0+4))

‎llvm/test/CodeGen/ARM/memfunc.ll

+3-3
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,12 @@
11
; RUN: llc < %s -mtriple=armv7-apple-ios -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-IOS --check-prefix=CHECK
22
; RUN: llc < %s -mtriple=thumbv7m-none-macho -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-DARWIN --check-prefix=CHECK
33
; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
4-
; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
4+
; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp3 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
55
; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
66
; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
7-
; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
7+
; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+vfp3 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
88
; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
9-
; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
9+
; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+vfp3 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
1010

1111
define void @f1(ptr %dest, ptr %src) "frame-pointer"="all" {
1212
entry:

‎llvm/test/CodeGen/ARM/no-expand-memcpy-no-builtins.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2-
; RUN: llc -mtriple=thumbv7em-apple-unknown-macho < %s | FileCheck %s
2+
; RUN: llc -mtriple=thumbv7em-apple-unknown-macho -mattr=+vfp3 < %s | FileCheck %s
33

44
target datalayout = "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
55

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