diff --git a/ports/cortex_a12/ac6/src/tx_thread_schedule.S b/ports/cortex_a12/ac6/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a12/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_a12/ac6/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a12/gnu/src/tx_thread_schedule.S b/ports/cortex_a12/gnu/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a12/gnu/src/tx_thread_schedule.S +++ b/ports/cortex_a12/gnu/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a15/ac6/src/tx_thread_schedule.S b/ports/cortex_a15/ac6/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a15/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_a15/ac6/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a15/gnu/src/tx_thread_schedule.S b/ports/cortex_a15/gnu/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a15/gnu/src/tx_thread_schedule.S +++ b/ports/cortex_a15/gnu/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a17/ac6/src/tx_thread_schedule.S b/ports/cortex_a17/ac6/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a17/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_a17/ac6/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a17/gnu/src/tx_thread_schedule.S b/ports/cortex_a17/gnu/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a17/gnu/src/tx_thread_schedule.S +++ b/ports/cortex_a17/gnu/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a5/ac6/src/tx_thread_schedule.S b/ports/cortex_a5/ac6/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a5/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_a5/ac6/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a5/gnu/src/tx_thread_schedule.S b/ports/cortex_a5/gnu/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a5/gnu/src/tx_thread_schedule.S +++ b/ports/cortex_a5/gnu/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a7/ac6/src/tx_thread_schedule.S b/ports/cortex_a7/ac6/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a7/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_a7/ac6/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a7/gnu/src/tx_thread_schedule.S b/ports/cortex_a7/gnu/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a7/gnu/src/tx_thread_schedule.S +++ b/ports/cortex_a7/gnu/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a8/ac6/src/tx_thread_schedule.S b/ports/cortex_a8/ac6/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a8/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_a8/ac6/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a8/gnu/src/tx_thread_schedule.S b/ports/cortex_a8/gnu/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a8/gnu/src/tx_thread_schedule.S +++ b/ports/cortex_a8/gnu/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a9/ac6/src/tx_thread_schedule.S b/ports/cortex_a9/ac6/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a9/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_a9/ac6/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports/cortex_a9/gnu/src/tx_thread_schedule.S b/ports/cortex_a9/gnu/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports/cortex_a9/gnu/src/tx_thread_schedule.S +++ b/ports/cortex_a9/gnu/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ diff --git a/ports_arch/ARMv7-A/threadx/common/src/tx_thread_schedule.S b/ports_arch/ARMv7-A/threadx/common/src/tx_thread_schedule.S index 07dd6f7f2..541270152 100644 --- a/ports_arch/ARMv7-A/threadx/common/src/tx_thread_schedule.S +++ b/ports_arch/ARMv7-A/threadx/common/src/tx_thread_schedule.S @@ -39,6 +39,14 @@ #define IRQ_MODE 0x12 // IRQ mode #define SVC_MODE 0x13 // SVC mode +#ifdef TX_ENABLE_VFP_SUPPORT +IRQ_MASK = 0x080 +#endif + +#ifdef TX_ENABLE_FIQ_SUPPORT +FIQ_MASK = 0x040 +#endif + /**************************************************************************/ /* */ /* FUNCTION RELEASE */