diff --git a/dist/Cores/ericlewis.Asteroids/bitstream.rbf_r b/dist/Cores/ericlewis.Asteroids/bitstream.rbf_r
index 13d45df..eaca22b 100644
Binary files a/dist/Cores/ericlewis.Asteroids/bitstream.rbf_r and b/dist/Cores/ericlewis.Asteroids/bitstream.rbf_r differ
diff --git a/src/fpga/apf/build_id.mif b/src/fpga/apf/build_id.mif
index 3de25a6..1fa5c78 100644
--- a/src/fpga/apf/build_id.mif
+++ b/src/fpga/apf/build_id.mif
@@ -10,7 +10,7 @@ CONTENT
BEGIN
0E0 : 20221011;
- 0E1 : 00152202;
- 0E2 : 882626ce;
+ 0E1 : 00163114;
+ 0E2 : 2a347c62;
END;
diff --git a/src/fpga/core/core_top.v b/src/fpga/core/core_top.v
index 87fcd7c..e4bb2e1 100644
--- a/src/fpga/core/core_top.v
+++ b/src/fpga/core/core_top.v
@@ -548,7 +548,6 @@ wire [24:0] ioctl_addr;
wire [7:0] ioctl_dout;
data_loader #(
- .ADDRESS_MASK_UPPER_4(0),
.WRITE_MEM_CLOCK_DELAY(4)
) rom_loader (
.clk_74a(clk_74a),
diff --git a/src/fpga/core/mf_pllbase.qip b/src/fpga/core/mf_pllbase.qip
index 5c016ed..4a89b32 100644
--- a/src/fpga/core/mf_pllbase.qip
+++ b/src/fpga/core/mf_pllbase.qip
@@ -28,11 +28,11 @@ set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_C
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3JlZmVyZW5jZV9jbG9ja19mcmVxdWVuY3k=::NzQuMjU=::UmVmZXJlbmNlIENsb2NrIEZyZXF1ZW5jeQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cmVmZXJlbmNlX2Nsb2NrX2ZyZXF1ZW5jeQ==::NzQuMjUgTUh6::cmVmZXJlbmNlX2Nsb2NrX2ZyZXF1ZW5jeQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2NoYW5uZWxfc3BhY2luZw==::MC4w::Q2hhbm5lbCBTcGFjaW5n"
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX29wZXJhdGlvbl9tb2Rl::bm9ybWFs::T3BlcmF0aW9uIE1vZGU="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX29wZXJhdGlvbl9tb2Rl::ZGlyZWN0::T3BlcmF0aW9uIE1vZGU="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2ZlZWRiYWNrX2Nsb2Nr::R2xvYmFsIENsb2Nr::RmVlZGJhY2sgQ2xvY2s="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2ZyYWN0aW9uYWxfY291dA==::MzI=::RnJhY3Rpb25hbCBjYXJyeSBvdXQ="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2RzbV9vdXRfc2Vs::MXN0X29yZGVy::RFNNIE9yZGVy"
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3BlcmF0aW9uX21vZGU=::bm9ybWFs::b3BlcmF0aW9uX21vZGU="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3BlcmF0aW9uX21vZGU=::ZGlyZWN0::b3BlcmF0aW9uX21vZGU="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3VzZV9sb2NrZWQ=::dHJ1ZQ==::RW5hYmxlIGxvY2tlZCBvdXRwdXQgcG9ydA=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX2Fkdl9wYXJhbXM=::ZmFsc2U=::RW5hYmxlIHBoeXNpY2FsIG91dHB1dCBjbG9jayBwYXJhbWV0ZXJz"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX251bWJlcl9vZl9jbG9ja3M=::NQ==::TnVtYmVyIE9mIENsb2Nrcw=="
@@ -43,9 +43,9 @@ set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_C
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjA=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kw::Ni4w::RGVzaXJlZCBGcmVxdWVuY3k="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzA=::MQ==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Iw::MTU=::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjA=::MjU1OTYxODcwMw==::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMA==::MTkz::QWN0dWFsIERpdmlkZSBGYWN0b3I="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Iw::OA==::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjA=::MzQ3MDY4MDA2::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMA==::MTAw::QWN0dWFsIERpdmlkZSBGYWN0b3I="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MA==::MCBNSHo=::QWN0dWFsIEZyZXF1ZW5jeQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMA==::cHM=::UGhhc2UgU2hpZnQgdW5pdHM="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MA==::MA==::UGhhc2UgU2hpZnQ="
@@ -53,11 +53,11 @@ set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_C
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDA=::MA==::QWN0dWFsIFBoYXNlIFNoaWZ0"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUw::NTA=::RHV0eSBDeWNsZQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjE=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kx::MjUuMTc1::RGVzaXJlZCBGcmVxdWVuY3k="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kx::MjUuMA==::RGVzaXJlZCBGcmVxdWVuY3k="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzE=::MQ==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Ix::MTU=::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjE=::MjU1OTYxODcwMw==::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMQ==::NDY=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Ix::OA==::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjE=::MzQ3MDY4MDA2::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMQ==::MjQ=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MQ==::Mjc2Ljc0MDY0MCBNSHo=::QWN0dWFsIEZyZXF1ZW5jeQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMQ==::ZGVncmVlcw==::UGhhc2UgU2hpZnQgdW5pdHM="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MQ==::MjAzNDU=::UGhhc2UgU2hpZnQ="
@@ -67,9 +67,9 @@ set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_C
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjI=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3ky::NTAuMA==::RGVzaXJlZCBGcmVxdWVuY3k="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzI=::MQ==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Iy::MTU=::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjI=::MjU1OTYxODcwMw==::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMg==::MjM=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Iy::OA==::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjI=::MzQ3MDY4MDA2::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMg==::MTI=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5Mg==::MCBNSHo=::QWN0dWFsIEZyZXF1ZW5jeQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMg==::cHM=::UGhhc2UgU2hpZnQgdW5pdHM="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0Mg==::MA==::UGhhc2UgU2hpZnQ="
@@ -79,9 +79,9 @@ set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_C
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjM=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kz::MjUuMA==::RGVzaXJlZCBGcmVxdWVuY3k="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzM=::MQ==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Iz::MTU=::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjM=::MjU1OTYxODcwMw==::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMw==::NDY=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3Iz::OA==::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjM=::MzQ3MDY4MDA2::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yMw==::MjQ=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5Mw==::MCBNSHo=::QWN0dWFsIEZyZXF1ZW5jeQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMw==::cHM=::UGhhc2UgU2hpZnQgdW5pdHM="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0Mw==::MA==::UGhhc2UgU2hpZnQ="
@@ -89,11 +89,11 @@ set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_C
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDM=::MjI1LjAgZGVn::QWN0dWFsIFBoYXNlIFNoaWZ0"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUz::NTA=::RHV0eSBDeWNsZQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjQ=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3k0::MjUuMTc1::RGVzaXJlZCBGcmVxdWVuY3k="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3k0::MjUuMA==::RGVzaXJlZCBGcmVxdWVuY3k="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzQ=::MQ==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3I0::MTU=::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjQ=::MjU1OTYxODcwMw==::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yNA==::NDY=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9tdWx0aXBseV9mYWN0b3I0::OA==::QWN0dWFsIE11bHRpcGx5IEZhY3Rvcg=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9mcmFjX211bHRpcGx5X2ZhY3RvcjQ=::MzQ3MDY4MDA2::QWN0dWFsIEZyYWN0aW9uYWwgTXVsdGlwbHkgRmFjdG9yIChLKQ=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kaXZpZGVfZmFjdG9yNA==::MjQ=::QWN0dWFsIERpdmlkZSBGYWN0b3I="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5NA==::MCBNSHo=::QWN0dWFsIEZyZXF1ZW5jeQ=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzNA==::cHM=::UGhhc2UgU2hpZnQgdW5pdHM="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0NA==::MA==::UGhhc2UgU2hpZnQ="
@@ -256,19 +256,19 @@ set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_C
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzE3::MC4w::UGhhc2UgU2hpZnQ="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDE3::MA==::QWN0dWFsIFBoYXNlIFNoaWZ0"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxNw==::NTA=::RHV0eSBDeWNsZQ=="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTA=::NS45OTk5OTkgTUh6::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTA="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTA=::Ni4wMDAwMDAgTUh6::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTA="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQw::MCBwcw==::cGhhc2Vfc2hpZnQw"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTA=::NTA=::ZHV0eV9jeWNsZTA="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTE=::MjUuMTczOTExIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTE="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQx::OTkzMSBwcw==::cGhhc2Vfc2hpZnQx"
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTE=::MjUuMDAwMDAwIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTE="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQx::MTAwMDAgcHM=::cGhhc2Vfc2hpZnQx"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTE=::NTA=::ZHV0eV9jeWNsZTE="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTI=::NTAuMzQ3ODIyIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTI="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTI=::NTAuMDAwMDAwIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTI="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQy::MCBwcw==::cGhhc2Vfc2hpZnQy"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTI=::NTA=::ZHV0eV9jeWNsZTI="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM=::MjUuMTczOTEwIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM=::MjUuMDAwMDAwIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQz::MCBwcw==::cGhhc2Vfc2hpZnQz"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTM=::NTA=::ZHV0eV9jeWNsZTM="
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTQ=::MjUuMTczOTEwIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTQ="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTQ=::MjUuMDAwMDAwIE1Ieg==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTQ="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQ0::MCBwcw==::cGhhc2Vfc2hpZnQ0"
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTQ=::NTA=::ZHV0eV9jeWNsZTQ="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTU=::MCBNSHo=::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTU="
@@ -318,7 +318,7 @@ set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_C
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cGxsX3R5cGU=::R2VuZXJhbA==::UExMIFRZUEU="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "cGxsX3N1YnR5cGU=::R2VuZXJhbA==::UExMIFNVQlRZUEU="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BhcmFtZXRlcl9saXN0::TS1Db3VudGVyIEhpIERpdmlkZSxNLUNvdW50ZXIgTG93IERpdmlkZSxOLUNvdW50ZXIgSGkgRGl2aWRlLE4tQ291bnRlciBMb3cgRGl2aWRlLE0tQ291bnRlciBCeXBhc3MgRW5hYmxlLE4tQ291bnRlciBCeXBhc3MgRW5hYmxlLE0tQ291bnRlciBPZGQgRGl2aWRlIEVuYWJsZSxOLUNvdW50ZXIgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTAgSGkgRGl2aWRlLEMtQ291bnRlci0wIExvdyBEaXZpZGUsQy1Db3VudGVyLTAgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0wIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTAgSW5wdXQgU291cmNlLEMtQ291bnRlci0wIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTAgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTEgSGkgRGl2aWRlLEMtQ291bnRlci0xIExvdyBEaXZpZGUsQy1Db3VudGVyLTEgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0xIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTEgSW5wdXQgU291cmNlLEMtQ291bnRlci0xIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTEgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTIgSGkgRGl2aWRlLEMtQ291bnRlci0yIExvdyBEaXZpZGUsQy1Db3VudGVyLTIgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0yIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTIgSW5wdXQgU291cmNlLEMtQ291bnRlci0yIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTIgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTMgSGkgRGl2aWRlLEMtQ291bnRlci0zIExvdyBEaXZpZGUsQy1Db3VudGVyLTMgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci0zIFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTMgSW5wdXQgU291cmNlLEMtQ291bnRlci0zIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTMgT2RkIERpdmlkZSBFbmFibGUsQy1Db3VudGVyLTQgSGkgRGl2aWRlLEMtQ291bnRlci00IExvdyBEaXZpZGUsQy1Db3VudGVyLTQgQ29hcnNlIFBoYXNlIFNoaWZ0LEMtQ291bnRlci00IFZDTyBQaGFzZSBUYXAsQy1Db3VudGVyLTQgSW5wdXQgU291cmNlLEMtQ291bnRlci00IEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTQgT2RkIERpdmlkZSBFbmFibGUsVkNPIFBvc3QgRGl2aWRlIENvdW50ZXIgRW5hYmxlLENoYXJnZSBQdW1wIGN1cnJlbnQgKHVBKSxMb29wIEZpbHRlciBCYW5kd2lkdGggUmVzaXN0b3IgKE9obXMpICxQTEwgT3V0cHV0IFZDTyBGcmVxdWVuY3ksSy1GcmFjdGlvbmFsIERpdmlzaW9uIFZhbHVlIChEU00pLEZlZWRiYWNrIENsb2NrIFR5cGUsRmVlZGJhY2sgQ2xvY2sgTVVYIDEsRmVlZGJhY2sgQ2xvY2sgTVVYIDIsTSBDb3VudGVyIFNvdXJjZSBNVVgsUExMIEF1dG8gUmVzZXQ=::UGFyYW1ldGVyIE5hbWVz"
-set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BhcmFtZXRlcl92YWx1ZXM=::OCw3LDI1NiwyNTYsZmFsc2UsdHJ1ZSx0cnVlLGZhbHNlLDk3LDk2LDEsMCxwaF9tdXhfY2xrLGZhbHNlLHRydWUsMjMsMjMsMTIsNCxwaF9tdXhfY2xrLGZhbHNlLGZhbHNlLDEyLDExLDEsMCxwaF9tdXhfY2xrLGZhbHNlLHRydWUsMjMsMjMsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsMjMsMjMsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsMSwyMCw0MDAwLDExNTcuOTk5ODU3IE1IeiwyNTU5NjE4NzAzLGdjbGssZ2xiLGZiXzEscGhfbXV4X2NsayxmYWxzZQ==::UGFyYW1ldGVyIFZhbHVlcw=="
+set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX3BhcmFtZXRlcl92YWx1ZXM=::NCw0LDI1NiwyNTYsZmFsc2UsdHJ1ZSxmYWxzZSxmYWxzZSw1MCw1MCwxLDAscGhfbXV4X2NsayxmYWxzZSxmYWxzZSwxMiwxMiw3LDAscGhfbXV4X2NsayxmYWxzZSxmYWxzZSw2LDYsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsMTIsMTIsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsMTIsMTIsMSwwLHBoX211eF9jbGssZmFsc2UsZmFsc2UsMiwyMCw0MDAwLDU5OS45OTk5OTkgTUh6LDM0NzA2ODAwNixub25lLGdsYixtX2NudCxwaF9tdXhfY2xrLGZhbHNl::UGFyYW1ldGVyIFZhbHVlcw=="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX21pZl9nZW5lcmF0ZQ==::ZmFsc2U=::R2VuZXJhdGUgTUlGIGZpbGU="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2VuYWJsZV9taWZfZHBz::ZmFsc2U=::RW5hYmxlIER5bmFtaWMgUGhhc2UgU2hpZnQgZm9yIE1JRiBzdHJlYW1pbmc="
set_global_assignment -entity "mf_pllbase_0002" -library "mf_pllbase" -name IP_COMPONENT_PARAMETER "Z3VpX2Rwc19jbnRy::QzA=::RFBTIENvdW50ZXIgU2VsZWN0aW9u"
diff --git a/src/fpga/core/mf_pllbase.v b/src/fpga/core/mf_pllbase.v
index 8e9ffce..191d26d 100644
--- a/src/fpga/core/mf_pllbase.v
+++ b/src/fpga/core/mf_pllbase.v
@@ -63,7 +63,7 @@ endmodule
// Retrieval info:
// Retrieval info:
// Retrieval info:
-// Retrieval info:
+// Retrieval info:
// Retrieval info:
// Retrieval info:
// Retrieval info:
@@ -83,7 +83,7 @@ endmodule
// Retrieval info:
// Retrieval info:
// Retrieval info:
-// Retrieval info:
+// Retrieval info:
// Retrieval info:
// Retrieval info:
// Retrieval info:
@@ -110,7 +110,7 @@ endmodule
// Retrieval info:
// Retrieval info:
// Retrieval info:
-// Retrieval info:
+// Retrieval info:
// Retrieval info:
// Retrieval info:
// Retrieval info:
diff --git a/src/fpga/core/mf_pllbase/mf_pllbase_0002.qip b/src/fpga/core/mf_pllbase/mf_pllbase_0002.qip
index 5578caa..81fb59c 100644
--- a/src/fpga/core/mf_pllbase/mf_pllbase_0002.qip
+++ b/src/fpga/core/mf_pllbase/mf_pllbase_0002.qip
@@ -1,4 +1,4 @@
-set_instance_assignment -name PLL_COMPENSATION_MODE NORMAL -to "*mf_pllbase_0002*|altera_pll:altera_pll_i*|*"
+set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to "*mf_pllbase_0002*|altera_pll:altera_pll_i*|*"
set_instance_assignment -name PLL_CHANNEL_SPACING "0.0 KHz" -to "*mf_pllbase_0002*|altera_pll:altera_pll_i*|*"
set_instance_assignment -name PLL_AUTO_RESET OFF -to "*mf_pllbase_0002*|altera_pll:altera_pll_i*|*"
set_instance_assignment -name PLL_BANDWIDTH_PRESET AUTO -to "*mf_pllbase_0002*|altera_pll:altera_pll_i*|*"
diff --git a/src/fpga/core/mf_pllbase/mf_pllbase_0002.v b/src/fpga/core/mf_pllbase/mf_pllbase_0002.v
index deea40f..52a5d80 100644
--- a/src/fpga/core/mf_pllbase/mf_pllbase_0002.v
+++ b/src/fpga/core/mf_pllbase/mf_pllbase_0002.v
@@ -29,21 +29,21 @@ module mf_pllbase_0002(
altera_pll #(
.fractional_vco_multiplier("true"),
.reference_clock_frequency("74.25 MHz"),
- .operation_mode("normal"),
+ .operation_mode("direct"),
.number_of_clocks(5),
- .output_clock_frequency0("5.999999 MHz"),
+ .output_clock_frequency0("6.000000 MHz"),
.phase_shift0("0 ps"),
.duty_cycle0(50),
- .output_clock_frequency1("25.173911 MHz"),
- .phase_shift1("9931 ps"),
+ .output_clock_frequency1("25.000000 MHz"),
+ .phase_shift1("10000 ps"),
.duty_cycle1(50),
- .output_clock_frequency2("50.347822 MHz"),
+ .output_clock_frequency2("50.000000 MHz"),
.phase_shift2("0 ps"),
.duty_cycle2(50),
- .output_clock_frequency3("25.173910 MHz"),
+ .output_clock_frequency3("25.000000 MHz"),
.phase_shift3("0 ps"),
.duty_cycle3(50),
- .output_clock_frequency4("25.173910 MHz"),
+ .output_clock_frequency4("25.000000 MHz"),
.phase_shift4("0 ps"),
.duty_cycle4(50),
.output_clock_frequency5("0 MHz"),
diff --git a/src/fpga/core/mf_pllbase_sim/aldec/rivierapro_setup.tcl b/src/fpga/core/mf_pllbase_sim/aldec/rivierapro_setup.tcl
index 3388317..1088080 100644
--- a/src/fpga/core/mf_pllbase_sim/aldec/rivierapro_setup.tcl
+++ b/src/fpga/core/mf_pllbase_sim/aldec/rivierapro_setup.tcl
@@ -12,7 +12,7 @@
# or its authorized distributors. Please refer to the applicable
# agreement for further details.
-# ACDS 21.1 850 win32 2022.09.11.12:56:01
+# ACDS 21.1 850 win32 2022.10.11.16:30:49
# ----------------------------------------
# Auto-generated simulation script rivierapro_setup.tcl
# ----------------------------------------
diff --git a/src/fpga/core/mf_pllbase_sim/cadence/ncsim_setup.sh b/src/fpga/core/mf_pllbase_sim/cadence/ncsim_setup.sh
index c682323..15dcac2 100644
--- a/src/fpga/core/mf_pllbase_sim/cadence/ncsim_setup.sh
+++ b/src/fpga/core/mf_pllbase_sim/cadence/ncsim_setup.sh
@@ -12,7 +12,7 @@
# or its authorized distributors. Please refer to the applicable
# agreement for further details.
-# ACDS 21.1 850 win32 2022.09.11.12:56:01
+# ACDS 21.1 850 win32 2022.10.11.16:30:49
# ----------------------------------------
# ncsim - auto-generated simulation script
@@ -106,7 +106,7 @@
# within the Quartus project, and generate a unified
# script which supports all the Altera IP within the design.
# ----------------------------------------
-# ACDS 21.1 850 win32 2022.09.11.12:56:01
+# ACDS 21.1 850 win32 2022.10.11.16:30:49
# ----------------------------------------
# initialize variables
TOP_LEVEL_NAME="mf_pllbase"
diff --git a/src/fpga/core/mf_pllbase_sim/mentor/msim_setup.tcl b/src/fpga/core/mf_pllbase_sim/mentor/msim_setup.tcl
index 5d1b2bc..834a75d 100644
--- a/src/fpga/core/mf_pllbase_sim/mentor/msim_setup.tcl
+++ b/src/fpga/core/mf_pllbase_sim/mentor/msim_setup.tcl
@@ -94,7 +94,7 @@
# within the Quartus project, and generate a unified
# script which supports all the Altera IP within the design.
# ----------------------------------------
-# ACDS 21.1 850 win32 2022.09.11.12:56:01
+# ACDS 21.1 850 win32 2022.10.11.16:30:49
# ----------------------------------------
# Initialize variables
diff --git a/src/fpga/core/mf_pllbase_sim/mf_pllbase.vo b/src/fpga/core/mf_pllbase_sim/mf_pllbase.vo
index ef73bf9..af330a3 100644
--- a/src/fpga/core/mf_pllbase_sim/mf_pllbase.vo
+++ b/src/fpga/core/mf_pllbase_sim/mf_pllbase.vo
@@ -234,9 +234,9 @@ module mf_pllbase
mf_pllbase_altera_pll_altera_pll_i_2475.n_cnt_lo_div = 1,
mf_pllbase_altera_pll_altera_pll_i_2475.n_cnt_odd_div_duty_en = "false",
mf_pllbase_altera_pll_altera_pll_i_2475.number_of_clocks = 5,
- mf_pllbase_altera_pll_altera_pll_i_2475.operation_mode = "normal",
- mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency0 = "5.999999 MHz",
- mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency1 = "25.173911 MHz",
+ mf_pllbase_altera_pll_altera_pll_i_2475.operation_mode = "direct",
+ mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency0 = "6.000000 MHz",
+ mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency1 = "25.000000 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency10 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency11 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency12 = "0 MHz",
@@ -245,16 +245,16 @@ module mf_pllbase
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency15 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency16 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency17 = "0 MHz",
- mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency2 = "50.347822 MHz",
- mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency3 = "25.173910 MHz",
- mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency4 = "25.173910 MHz",
+ mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency2 = "50.000000 MHz",
+ mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency3 = "25.000000 MHz",
+ mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency4 = "25.000000 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency5 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency6 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency7 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency8 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.output_clock_frequency9 = "0 MHz",
mf_pllbase_altera_pll_altera_pll_i_2475.phase_shift0 = "0 ps",
- mf_pllbase_altera_pll_altera_pll_i_2475.phase_shift1 = "9931 ps",
+ mf_pllbase_altera_pll_altera_pll_i_2475.phase_shift1 = "10000 ps",
mf_pllbase_altera_pll_altera_pll_i_2475.phase_shift10 = "0 ps",
mf_pllbase_altera_pll_altera_pll_i_2475.phase_shift11 = "0 ps",
mf_pllbase_altera_pll_altera_pll_i_2475.phase_shift12 = "0 ps",
diff --git a/src/fpga/core/mf_pllbase_sim/synopsys/vcs/vcs_setup.sh b/src/fpga/core/mf_pllbase_sim/synopsys/vcs/vcs_setup.sh
index c882222..6dd82af 100644
--- a/src/fpga/core/mf_pllbase_sim/synopsys/vcs/vcs_setup.sh
+++ b/src/fpga/core/mf_pllbase_sim/synopsys/vcs/vcs_setup.sh
@@ -12,7 +12,7 @@
# or its authorized distributors. Please refer to the applicable
# agreement for further details.
-# ACDS 21.1 850 win32 2022.09.11.12:56:01
+# ACDS 21.1 850 win32 2022.10.11.16:30:49
# ----------------------------------------
# vcs - auto-generated simulation script
@@ -94,7 +94,7 @@
# within the Quartus project, and generate a unified
# script which supports all the Altera IP within the design.
# ----------------------------------------
-# ACDS 21.1 850 win32 2022.09.11.12:56:01
+# ACDS 21.1 850 win32 2022.10.11.16:30:49
# ----------------------------------------
# initialize variables
TOP_LEVEL_NAME="mf_pllbase"
diff --git a/src/fpga/core/mf_pllbase_sim/synopsys/vcsmx/vcsmx_setup.sh b/src/fpga/core/mf_pllbase_sim/synopsys/vcsmx/vcsmx_setup.sh
index bafbe0c..c596f7b 100644
--- a/src/fpga/core/mf_pllbase_sim/synopsys/vcsmx/vcsmx_setup.sh
+++ b/src/fpga/core/mf_pllbase_sim/synopsys/vcsmx/vcsmx_setup.sh
@@ -12,7 +12,7 @@
# or its authorized distributors. Please refer to the applicable
# agreement for further details.
-# ACDS 21.1 850 win32 2022.09.11.12:56:01
+# ACDS 21.1 850 win32 2022.10.11.16:30:49
# ----------------------------------------
# vcsmx - auto-generated simulation script
@@ -107,7 +107,7 @@
# within the Quartus project, and generate a unified
# script which supports all the Altera IP within the design.
# ----------------------------------------
-# ACDS 21.1 850 win32 2022.09.11.12:56:01
+# ACDS 21.1 850 win32 2022.10.11.16:30:49
# ----------------------------------------
# initialize variables
TOP_LEVEL_NAME="mf_pllbase"
diff --git a/src/fpga/output_files/ap_core.rbf b/src/fpga/output_files/ap_core.rbf
index b7b20d2..18d8f18 100644
Binary files a/src/fpga/output_files/ap_core.rbf and b/src/fpga/output_files/ap_core.rbf differ
diff --git a/src/fpga/output_files/ap_core.sof b/src/fpga/output_files/ap_core.sof
index c8e43ad..6e6f715 100644
Binary files a/src/fpga/output_files/ap_core.sof and b/src/fpga/output_files/ap_core.sof differ
diff --git a/src/fpga/output_files/bitstream.rbf_r b/src/fpga/output_files/bitstream.rbf_r
index 13d45df..eaca22b 100644
Binary files a/src/fpga/output_files/bitstream.rbf_r and b/src/fpga/output_files/bitstream.rbf_r differ