feat(chisel): display raw stack values when logging variable

[transmissions11]

Component

Chisel

Describe the feature you would like

Currently with <32 byte types, their higher order bits aren't shown anywhere except the stackdump. Often when I'm fooling around with assembly I want to see the full in-stack representation of these types (higher order bits and all), so would be great if there was an additional field in the variable output like Raw: 0x1000000000000000000000000000000000000000000000000000000000000002 so we could easily observe these things. Another option would be a !raw [var]-esque command.

Here are some repro cases of higher order bits not being shown.

λ chisel
Welcome to Chisel! Type `!help` to show available commands.

➜ uint16 num = 2;
➜ assembly { num := 0x1000000000000000000000000000000000000000000000000000000000000002 }
➜ num
Type: uint
├ Hex: 0x2
└ Decimal: 2
➜ !sd
[0]: 0x1000000000000000000000000000000000000000000000000000000000000002
[1]: 0x33
[2]: 0xc0406226

➜ address addy = address(0xBEEF);
➜ assembly { addy := 0x100000000000000000000000000000000000000000000000000000000000beef }
➜ addy
Type: address
└ Data: 0x000000000000000000000000000000000000beef
➜ !sd
[0]: 0x100000000000000000000000000000000000000000000000000000000000beef
[1]: 0x33
[2]: 0xc0406226

Additional context

No response

[transmissions11]

cc @clabby

[clabby]

Should be able to add this in, I like the idea! Would you mind cross-posting any Chisel feature requests to #3743?

[transmissions11]

ah yup for sure, apologies i missed the meta issue