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| 1 | +// This model is automatically generated from the PRISM model |
| 2 | + |
| 3 | +// All changes made will be lost after regeneration. |
| 4 | + |
| 5 | +// PRISM Output |
| 6 | + |
| 7 | +ctmc |
| 8 | + |
| 9 | + |
| 10 | +evolve param double p_c_a [0..1]; |
| 11 | +evolve param double p_d_1 [0..1]; |
| 12 | +evolve param double p_d_2 [0..1]; |
| 13 | +evolve param double p_c_c [0..1]; |
| 14 | +evolve param double p_c_b [0..1]; |
| 15 | + |
| 16 | +evolve int x [0..1]; |
| 17 | + |
| 18 | +const double p_d_12 = 0.5;// [0..1]; |
| 19 | + |
| 20 | + |
| 21 | +const int INACTIVE = (100); |
| 22 | +const double mean_duration = (0.001); |
| 23 | +const int PAL_I0_E1_I0 = (0); |
| 24 | +const int PAL_I0_E1_Prepare = (1); |
| 25 | +const int PAL_I0_E1_F1 = (2); |
| 26 | +const int PAL_I0_E1_R1ToCorA = (3); |
| 27 | +const int PAL_I0_E1_R1ToDoorAB = (4); |
| 28 | +const int PAL_I0_E1_D1 = (5); |
| 29 | +const int PAL_I0_E1_M1 = (6); |
| 30 | +const int PAL_I0_E1_M3 = (7); |
| 31 | +const int PAL_I0_E1_D2 = (8); |
| 32 | +const int PAL_I0_E1_R1ToCorBThrDoor1 = (9); |
| 33 | +const int PAL_I0_E1_R1ToCorBThrDoor2 = (10); |
| 34 | +const int PAL_I0_E1_D3 = (11); |
| 35 | +const int PAL_I0_E1_D4 = (12); |
| 36 | +const int PAL_I0_E1_M2 = (13); |
| 37 | +const int PAL_I0_E1_R1ToRoomD = (14); |
| 38 | +const int PAL_I0_E1_D5 = (15); |
| 39 | +const int PAL_I0_E1_R1DeliveredRoomD = (16); |
| 40 | +const int PAL_I0_E1_M4 = (17); |
| 41 | +const int PAL_I0_E1_R1Stuck = (18); |
| 42 | +const int PAL_I0_E1_J1 = (19); |
| 43 | +const int PAL_F1_E25_R2ToCorC = (0); |
| 44 | +const int PAL_F1_E25_R2ToDoorCD = (1); |
| 45 | +const int PAL_F1_E25_D6 = (2); |
| 46 | +const int PAL_F1_E25_R2DeliveredRoomD = (3); |
| 47 | +const int PAL_F1_E25_R2Stuck = (4); |
| 48 | +const int PAL_F1_E25_M5 = (5); |
| 49 | +const int PAL_F1_E25_J1 = (6); |
| 50 | +const int PAL_F1_E25_AF = (7); |
| 51 | +const double r_prep = (0.9998); |
| 52 | +const double r1 = (1.0); |
| 53 | +const double d_prep = (0.5); |
| 54 | +const double d_cor_a = (0.2); |
| 55 | +const double d_cor_c = (0.2); |
| 56 | +const double d_door_ab = (0.5); |
| 57 | +const double d_door_cd = (2.5); |
| 58 | +const double d_cor_b_d1 = (0.5); |
| 59 | +const double d_cor_b_d2 = (0.5); |
| 60 | +const double d_r1_rd = (1.0); |
| 61 | +const double d_r1_stuck = (1.0); |
| 62 | +const double d_r2_stuck = (1.0); |
| 63 | +const double d_r1_delivered = (0.5); |
| 64 | +const double d_r2_delivered = (0.5); |
| 65 | +const double t = (10.0); |
| 66 | + |
| 67 | + |
| 68 | + |
| 69 | +formula PAL_to_be_terminated = (PAL_I0_E1_to_be_terminated)|(PAL_F1_E25_to_be_terminated); |
| 70 | +formula PAL_to_be_failed = PAL_I0_E1_to_be_failed; |
| 71 | +formula default_rate = ((1.0)/mean_duration); |
| 72 | + |
| 73 | + |
| 74 | + |
| 75 | + |
| 76 | +rewards "reward_door12_attempt" |
| 77 | + [PAL_I0_E1_R1ToCorBThrDoor1] ((PAL_I0_E1_pc=PAL_I0_E1_R1ToCorBThrDoor1)) : r1; |
| 78 | + [PAL_I0_E1_R1ToCorBThrDoor2] ((PAL_I0_E1_pc=PAL_I0_E1_R1ToCorBThrDoor2)) : r1; |
| 79 | +endrewards |
| 80 | + |
| 81 | + |
| 82 | + |
| 83 | + |
| 84 | +module PAL_I0_E1 |
| 85 | + PAL_I0_E1_pc : [0..INACTIVE] init 0; |
| 86 | + PAL_I0_E1_to_be_terminated : bool init false; |
| 87 | + PAL_I0_E1_to_be_failed : bool init false; |
| 88 | + PAL_terminated : bool init false; |
| 89 | + |
| 90 | + [PAL_I0_E1_I0] ((PAL_I0_E1_pc=PAL_I0_E1_I0))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_I0_E1_pc'=PAL_I0_E1_Prepare); |
| 91 | + |
| 92 | + [PAL_I0_E1_Prepare] ((PAL_I0_E1_pc=PAL_I0_E1_Prepare))&(! (PAL_to_be_terminated)) -> (((1.0)/d_prep)*((1.0)-r_prep)):(PAL_I0_E1_pc'=INACTIVE)&(PAL_I0_E1_to_be_failed'=true)&(PAL_I0_E1_to_be_terminated'=true) + (((1.0)/d_prep)*r_prep):(PAL_I0_E1_pc'=PAL_I0_E1_F1); |
| 93 | + |
| 94 | + [PAL_F1] ((PAL_I0_E1_pc=PAL_I0_E1_F1))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_I0_E1_pc'=PAL_I0_E1_R1ToCorA); |
| 95 | + |
| 96 | + [PAL_I0_E1_R1ToCorA] ((PAL_I0_E1_pc=PAL_I0_E1_R1ToCorA))&(! (PAL_to_be_terminated)) -> ((1.0)/d_cor_a):(PAL_I0_E1_pc'=PAL_I0_E1_R1ToDoorAB); |
| 97 | + |
| 98 | + [PAL_I0_E1_R1ToDoorAB] ((PAL_I0_E1_pc=PAL_I0_E1_R1ToDoorAB))&(! (PAL_to_be_terminated)) -> ((1.0)/d_door_ab):(PAL_I0_E1_pc'=PAL_I0_E1_D1); |
| 99 | + |
| 100 | + [PAL_I0_E1_D1] ((PAL_I0_E1_pc=PAL_I0_E1_D1))&(! (PAL_to_be_terminated)) -> (default_rate*p_c_a):(PAL_I0_E1_pc'=PAL_I0_E1_M1) + (default_rate*((1.0)-p_c_a)):(PAL_I0_E1_pc'=PAL_I0_E1_M3); |
| 101 | + |
| 102 | + [PAL_I0_E1_M1] ((PAL_I0_E1_pc=PAL_I0_E1_M1))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_I0_E1_pc'=PAL_I0_E1_D2); |
| 103 | + |
| 104 | + [PAL_I0_E1_M3] ((PAL_I0_E1_pc=PAL_I0_E1_M3))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_I0_E1_pc'=PAL_I0_E1_R1Stuck); |
| 105 | + |
| 106 | + [PAL_I0_E1_D2] ((PAL_I0_E1_pc=PAL_I0_E1_D2))&(! (PAL_to_be_terminated)) -> (default_rate*p_d_12):(PAL_I0_E1_pc'=PAL_I0_E1_R1ToCorBThrDoor1) + (default_rate*((1.0)-p_d_12)):(PAL_I0_E1_pc'=PAL_I0_E1_R1ToCorBThrDoor2); |
| 107 | + |
| 108 | + [PAL_I0_E1_R1ToCorBThrDoor1] ((PAL_I0_E1_pc=PAL_I0_E1_R1ToCorBThrDoor1))&(! (PAL_to_be_terminated)) -> ((1.0)/d_cor_b_d1):(PAL_I0_E1_pc'=PAL_I0_E1_D3); |
| 109 | + |
| 110 | + [PAL_I0_E1_R1ToCorBThrDoor2] ((PAL_I0_E1_pc=PAL_I0_E1_R1ToCorBThrDoor2))&(! (PAL_to_be_terminated)) -> ((1.0)/d_cor_b_d2):(PAL_I0_E1_pc'=PAL_I0_E1_D4); |
| 111 | + |
| 112 | + [PAL_I0_E1_D3] ((PAL_I0_E1_pc=PAL_I0_E1_D3))&(! (PAL_to_be_terminated)) -> (default_rate*p_d_1):(PAL_I0_E1_pc'=PAL_I0_E1_M2) + (default_rate*((1.0)-p_d_1)):(PAL_I0_E1_pc'=PAL_I0_E1_M1); |
| 113 | + |
| 114 | + [PAL_I0_E1_D4] ((PAL_I0_E1_pc=PAL_I0_E1_D4))&(! (PAL_to_be_terminated)) -> (default_rate*p_d_2):(PAL_I0_E1_pc'=PAL_I0_E1_M2) + (default_rate*((1.0)-p_d_2)):(PAL_I0_E1_pc'=PAL_I0_E1_M1); |
| 115 | + |
| 116 | + [PAL_I0_E1_M2] ((PAL_I0_E1_pc=PAL_I0_E1_M2))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_I0_E1_pc'=PAL_I0_E1_R1ToRoomD); |
| 117 | + |
| 118 | + [PAL_I0_E1_R1ToRoomD] ((PAL_I0_E1_pc=PAL_I0_E1_R1ToRoomD))&(! (PAL_to_be_terminated)) -> ((1.0)/d_r1_rd):(PAL_I0_E1_pc'=PAL_I0_E1_D5); |
| 119 | + |
| 120 | + [PAL_I0_E1_D5] ((PAL_I0_E1_pc=PAL_I0_E1_D5))&(! (PAL_to_be_terminated)) -> (default_rate*p_c_b):(PAL_I0_E1_pc'=PAL_I0_E1_R1DeliveredRoomD) + (default_rate*((1.0)-p_c_b)):(PAL_I0_E1_pc'=PAL_I0_E1_M3); |
| 121 | + |
| 122 | + [PAL_I0_E1_R1DeliveredRoomD] ((PAL_I0_E1_pc=PAL_I0_E1_R1DeliveredRoomD))&(! (PAL_to_be_terminated)) -> ((1.0)/d_r1_delivered):(PAL_I0_E1_pc'=PAL_I0_E1_M4); |
| 123 | + |
| 124 | + [PAL_I0_E1_M4] ((PAL_I0_E1_pc=PAL_I0_E1_M4))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_I0_E1_pc'=PAL_I0_E1_J1); |
| 125 | + |
| 126 | + [PAL_I0_E1_R1Stuck] ((PAL_I0_E1_pc=PAL_I0_E1_R1Stuck))&(! (PAL_to_be_terminated)) -> ((1.0)/d_r1_stuck):(PAL_I0_E1_pc'=PAL_I0_E1_M4); |
| 127 | + |
| 128 | + [PAL_J1] ((PAL_I0_E1_pc=PAL_I0_E1_J1))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_I0_E1_pc'=INACTIVE); |
| 129 | + |
| 130 | + [PAL_terminate] (PAL_to_be_terminated)&(! (PAL_terminated)) -> default_rate:(PAL_I0_E1_pc'=INACTIVE)&(PAL_terminated'=true); |
| 131 | + |
| 132 | + [] ((PAL_I0_E1_pc=INACTIVE))&((PAL_terminated)&(! (PAL_to_be_terminated))) -> default_rate:true; |
| 133 | + |
| 134 | +endmodule |
| 135 | + |
| 136 | +module PAL_F1_E25 |
| 137 | + PAL_F1_E25_pc : [0..INACTIVE] init INACTIVE; |
| 138 | + PAL_F1_E25_to_be_terminated : bool init false; |
| 139 | + |
| 140 | + [PAL_F1] ((PAL_F1_E25_pc=INACTIVE))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_F1_E25_pc'=PAL_F1_E25_R2ToCorC); |
| 141 | + |
| 142 | + [PAL_F1_E25_R2ToCorC] ((PAL_F1_E25_pc=PAL_F1_E25_R2ToCorC))&(! (PAL_to_be_terminated)) -> ((1.0)/d_cor_c):(PAL_F1_E25_pc'=PAL_F1_E25_R2ToDoorCD); |
| 143 | + |
| 144 | + [PAL_F1_E25_R2ToDoorCD] ((PAL_F1_E25_pc=PAL_F1_E25_R2ToDoorCD))&(! (PAL_to_be_terminated)) -> ((1.0)/d_door_cd):(PAL_F1_E25_pc'=PAL_F1_E25_D6); |
| 145 | + |
| 146 | + [PAL_F1_E25_D6] ((PAL_F1_E25_pc=PAL_F1_E25_D6))&(! (PAL_to_be_terminated)) -> (default_rate*p_c_c):(PAL_F1_E25_pc'=PAL_F1_E25_R2DeliveredRoomD) + (default_rate*((1.0)-p_c_c)):(PAL_F1_E25_pc'=PAL_F1_E25_R2Stuck); |
| 147 | + |
| 148 | + [PAL_F1_E25_R2DeliveredRoomD] ((PAL_F1_E25_pc=PAL_F1_E25_R2DeliveredRoomD))&(! (PAL_to_be_terminated)) -> ((1.0)/d_r2_delivered):(PAL_F1_E25_pc'=PAL_F1_E25_M5); |
| 149 | + |
| 150 | + [PAL_F1_E25_R2Stuck] ((PAL_F1_E25_pc=PAL_F1_E25_R2Stuck))&(! (PAL_to_be_terminated)) -> ((1.0)/d_r2_stuck):(PAL_F1_E25_pc'=PAL_F1_E25_M5); |
| 151 | + |
| 152 | + [PAL_F1_E25_M5] ((PAL_F1_E25_pc=PAL_F1_E25_M5))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_F1_E25_pc'=PAL_F1_E25_J1); |
| 153 | + |
| 154 | + [PAL_J1] ((PAL_F1_E25_pc=PAL_F1_E25_J1))&(! (PAL_to_be_terminated)) -> default_rate:(PAL_F1_E25_pc'=PAL_F1_E25_AF)&(PAL_F1_E25_to_be_terminated'=true); |
| 155 | + |
| 156 | + [PAL_terminate] PAL_to_be_terminated -> default_rate:(PAL_F1_E25_pc'=INACTIVE)&(PAL_F1_E25_to_be_terminated'=false); |
| 157 | + |
| 158 | +endmodule |
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