From 1fd3645c20aed88d4e5bad3d9d47c8aee758a1d6 Mon Sep 17 00:00:00 2001 From: Paul Melnikov Date: Tue, 18 Jun 2024 21:14:01 +0000 Subject: [PATCH 1/8] Add support for nRF52810 --- cores/nRF5/Uart.cpp | 9 + cores/nRF5/freertos/port.c | 4 + cores/nRF5/freertos/port_nrf52.c | 9 +- cores/nRF5/freertos/port_nrf52_systick.c | 2 + cores/nRF5/nimble_config/ext_nimble_config.h | 2 + cores/nRF5/nimble_config/nrf52810_nimconfig.h | 1319 +++++++++++++++++ cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c | 203 +++ cores/nRF5/nordic/nrfx/mdk/system_nrf52810.h | 46 + cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h | 6 + cores/nRF5/wiring_analog_nRF52.c | 4 + 10 files changed, 1601 insertions(+), 3 deletions(-) create mode 100644 cores/nRF5/nimble_config/nrf52810_nimconfig.h create mode 100644 cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c create mode 100644 cores/nRF5/nordic/nrfx/mdk/system_nrf52810.h diff --git a/cores/nRF5/Uart.cpp b/cores/nRF5/Uart.cpp index 5937cd7..98263b7 100644 --- a/cores/nRF5/Uart.cpp +++ b/cores/nRF5/Uart.cpp @@ -21,6 +21,15 @@ #include "Arduino.h" #include "wiring_private.h" +// these nRF52s have different UART PSEL definition +#if defined(NRF52810_XXAA) || defined(NRF52805_XXAA) \ + || defined(NRF52811_XXAA) || defined(NRF52833_XXAA) \ + || defined(NRF52840_XXAA) +#define PSELTXD PSEL.TXD +#define PSELRXD PSEL.RXD +#define PSELCTS PSEL.CTS +#define PSELRTS PSEL.RTS +#endif void serialEventRun(void) { diff --git a/cores/nRF5/freertos/port.c b/cores/nRF5/freertos/port.c index 1223245..f389793 100644 --- a/cores/nRF5/freertos/port.c +++ b/cores/nRF5/freertos/port.c @@ -205,9 +205,11 @@ void xPortPendSVHandler( void ) " ldr r3, =pxCurrentTCB \n" /* Get the location of the current TCB. */ " ldr r2, [r3] \n" " \n" +#if (__FPU_PRESENT == 1U) " tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */ " it eq \n" " vstmdbeq r0!, {s16-s31} \n" +#endif " \n" " stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */ " \n" @@ -228,9 +230,11 @@ void xPortPendSVHandler( void ) " \n" " ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */ " \n" +#if (__FPU_PRESENT == 1U) " tst r14, #0x10 \n" /* Is the task using the FPU context? If so, pop the high vfp registers too. */ " it eq \n" " vldmiaeq r0!, {s16-s31} \n" +#endif " \n" " msr psp, r0 \n" " isb \n" diff --git a/cores/nRF5/freertos/port_nrf52.c b/cores/nRF5/freertos/port_nrf52.c index 6b72ecc..c1d6665 100644 --- a/cores/nRF5/freertos/port_nrf52.c +++ b/cores/nRF5/freertos/port_nrf52.c @@ -36,9 +36,10 @@ #include "app_util_platform.h" #endif -#if !(__FPU_USED) && !(__LINT__) - #error This port can only be used when the project options are configured to enable hardware floating point support. -#endif +//* see https://devzone.nordicsemi.com/f/nordic-q-a/30103/freertos-on-nrf52810 +// #if !(__FPU_USED) && !(__LINT__) +// #error This port can only be used when the project options are configured to enable hardware floating point support. +// #endif #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html @@ -227,8 +228,10 @@ BaseType_t xPortStartScheduler( void ) /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); +#if (__FPU_PRESENT == 1U) /* Lazy save always. */ FPU->FPCCR |= FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk; +#endif /* Finally this port requires SEVONPEND to be active */ SCB->SCR |= SCB_SCR_SEVONPEND_Msk; diff --git a/cores/nRF5/freertos/port_nrf52_systick.c b/cores/nRF5/freertos/port_nrf52_systick.c index 871b22a..f3ac44d 100644 --- a/cores/nRF5/freertos/port_nrf52_systick.c +++ b/cores/nRF5/freertos/port_nrf52_systick.c @@ -242,6 +242,7 @@ void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) else #endif { +#if (__FPU_PRESENT == 1U) // Fix ERRATA 87 (https://infocenter.nordicsemi.com/index.jsp?topic=%252Fcom.nordic.infocenter.sdk5.v11.0.0%252Findex.html&cp=4_0_0) // Clear FPU interrupt before going to sleep. This prevent unexpected wake-up. #define FPU_EXCEPTION_MASK 0x0000009F @@ -249,6 +250,7 @@ void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) __set_FPSCR(__get_FPSCR() & ~(FPU_EXCEPTION_MASK)); (void) __get_FPSCR(); NVIC_ClearPendingIRQ(FPU_IRQn); +#endif /* No SD - we would just block interrupts globally. * BASEPRI cannot be used for that because it would prevent WFE from wake up. diff --git a/cores/nRF5/nimble_config/ext_nimble_config.h b/cores/nRF5/nimble_config/ext_nimble_config.h index 9a52801..ae445bd 100644 --- a/cores/nRF5/nimble_config/ext_nimble_config.h +++ b/cores/nRF5/nimble_config/ext_nimble_config.h @@ -1,5 +1,7 @@ #if defined(NRF51) #include "nrf51_nimconfig.h" +#elif defined(NRF52810_XXAA) +#include "nrf52810_nimconfig.h" #elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB) #include "nrf52832_nimconfig.h" #elif defined(NRF52833_XXAA) diff --git a/cores/nRF5/nimble_config/nrf52810_nimconfig.h b/cores/nRF5/nimble_config/nrf52810_nimconfig.h new file mode 100644 index 0000000..d1ee6ce --- /dev/null +++ b/cores/nRF5/nimble_config/nrf52810_nimconfig.h @@ -0,0 +1,1319 @@ +#ifndef _NRF52810_CONFIG_H +#define _NRF52810_CONFIG_H + +#if !defined(NRF52810_XXAA) && !defined(NRF52810_XXAB) +#error NRF52810_XXAA/B not defined +#else + +#ifndef CONFIG_BT_NIMBLE_MAX_CONNECTIONS +# define CONFIG_BT_NIMBLE_MAX_CONNECTIONS 3 +#endif + +#ifndef CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT +#define CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT (12) +#endif + +#ifndef CONFIG_BT_NIMBLE_MAX_BONDS +#define CONFIG_BT_NIMBLE_MAX_BONDS 3 +#endif + +#if CONFIG_BT_NIMBLE_MAX_BONDS +# ifndef CONFIG_BT_NIMBLE_MAX_CCCDS +# define CONFIG_BT_NIMBLE_MAX_CCCDS 3 +# endif +# ifndef CONFIG_BT_NIMBLE_ENABLE_PRIVACY +# define CONFIG_BT_NIMBLE_ENABLE_PRIVACY (1) +# endif +#else +# define CONFIG_BT_NIMBLE_MAX_CCCDS 0 +# ifndef CONFIG_BT_NIMBLE_ENABLE_PRIVACY +# define CONFIG_BT_NIMBLE_ENABLE_PRIVACY (0) +# endif +#endif + +#ifndef CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU +#define CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU (256) +#endif + +#ifndef CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME +#define CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME "nimble" +#endif + +#ifndef CONFIG_BT_NIMBLE_LOG_LEVEL +#define CONFIG_BT_NIMBLE_LOG_LEVEL 5 +#endif + +#ifndef CONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED +#define CONFIG_BT_NIMBLE_ROLE_CENTRAL +#endif + +#ifndef CONFIG_BT_NIMBLE_ROLE_OBSERVER_DISABLED +#define CONFIG_BT_NIMBLE_ROLE_OBSERVER +#endif + +#ifndef CONFIG_BT_NIMBLE_ROLE_PERIPHERAL_DISABLED +#define CONFIG_BT_NIMBLE_ROLE_PERIPHERAL +#endif + +#ifndef CONFIG_BT_NIMBLE_ROLE_BROADCASTER_DISABLED +#define CONFIG_BT_NIMBLE_ROLE_BROADCASTER +#endif + +#ifndef CONFIG_BT_NIMBLE_SVC_GAP_APPEARANCE +#define CONFIG_BT_NIMBLE_SVC_GAP_APPEARANCE 0x0 +#endif + +#ifndef CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE +#define CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE 2048 +#endif + +#ifndef CONFIG_NIMBLE_STACK_USE_MEM_POOLS +#define CONFIG_NIMBLE_STACK_USE_MEM_POOLS 0 +#endif + +#if CONFIG_BT_NIMBLE_ENABLE_PERIODIC_ADV && !CONFIG_BT_NIMBLE_EXT_ADV +# error Extended advertising must be enabled to use periodic advertising. +#endif + +/* Must have max instances and data length set if extended advertising is enabled */ +#if CONFIG_BT_NIMBLE_EXT_ADV +# if !defined(CONFIG_BT_NIMBLE_MAX_EXT_ADV_INSTANCES) +# define CONFIG_BT_NIMBLE_MAX_EXT_ADV_INSTANCES 1 +# endif +# if !defined(CONFIG_BT_NIMBLE_MAX_EXT_ADV_DATA_LEN) +# define CONFIG_BT_NIMBLE_MAX_EXT_ADV_DATA_LEN 251 +# endif +#endif + +#ifdef USE_LFRC +#define MYNEWT_VAL_BLE_LL_SCA (500) +#endif + +/** + * This macro exists to ensure code includes this header when needed. If code + * checks the existence of a setting directly via ifdef without including this + * header, the setting macro will silently evaluate to 0. In contrast, an + * attempt to use these macros without including this header will result in a + * compiler error. + */ +#define MYNEWT_VAL(_name) MYNEWT_VAL_ ## _name +#define MYNEWT_VAL_CHOICE(_name, _val) MYNEWT_VAL_ ## _name ## __ ## _val + +#define MYNEWT_VAL_TIMER_5 (1) +#define MYNEWT_VAL_OS_CPUTIME_TIMER_NUM (5) + +/*** @apache-mynewt-core/kernel/os */ + +#ifndef MYNEWT_VAL_MSYS_1_BLOCK_COUNT +#define MYNEWT_VAL_MSYS_1_BLOCK_COUNT CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT +#endif + +#ifndef MYNEWT_VAL_MSYS_1_BLOCK_SIZE +#define MYNEWT_VAL_MSYS_1_BLOCK_SIZE (292) +#endif + +#ifndef MYNEWT_VAL_MSYS_2_BLOCK_COUNT +#define MYNEWT_VAL_MSYS_2_BLOCK_COUNT (0) +#endif + +#ifndef MYNEWT_VAL_MSYS_2_BLOCK_SIZE +#define MYNEWT_VAL_MSYS_2_BLOCK_SIZE (0) +#endif + +#ifndef MYNEWT_VAL_OS_CPUTIME_FREQ +#define MYNEWT_VAL_OS_CPUTIME_FREQ (32768) +#endif + +#ifndef MYNEWT_VAL_OS_MEMPOOL_CHECK +#define MYNEWT_VAL_OS_MEMPOOL_CHECK (0) +#endif + +#ifndef MYNEWT_VAL_OS_MEMPOOL_GUARD +#define MYNEWT_VAL_OS_MEMPOOL_GUARD (0) +#endif + +#ifndef MYNEWT_VAL_OS_MEMPOOL_POISON +#define MYNEWT_VAL_OS_MEMPOOL_POISON (0) +#endif + +#ifndef MYNEWT_VAL_OS_SYSVIEW +#define MYNEWT_VAL_OS_SYSVIEW (0) +#endif + +#ifndef MYNEWT_VAL_OS_SYSVIEW_TRACE_MEMPOOL +#define MYNEWT_VAL_OS_SYSVIEW_TRACE_MEMPOOL (0) +#endif + +/*** @apache-mynewt-core/sys/log/common */ +#ifndef MYNEWT_VAL_LOG_GLOBAL_IDX +#define MYNEWT_VAL_LOG_GLOBAL_IDX (1) +#endif + +/*** @apache-mynewt-core/sys/log/stub */ +#ifndef MYNEWT_VAL_BLE_CONTROLLER +#define MYNEWT_VAL_BLE_CONTROLLER (1) +#endif + +/*** @apache-mynewt-nimble/nimble */ +#ifndef MYNEWT_VAL_BLE_EXT_ADV +#define MYNEWT_VAL_BLE_EXT_ADV CONFIG_BT_NIMBLE_EXT_ADV +#endif + +#ifndef MYNEWT_VAL_BLE_EXT_ADV_MAX_SIZE +#ifdef CONFIG_BT_NIMBLE_EXT_ADV +#define MYNEWT_VAL_BLE_EXT_ADV_MAX_SIZE (CONFIG_BT_NIMBLE_MAX_EXT_ADV_DATA_LEN) +#else +#define MYNEWT_VAL_BLE_EXT_ADV_MAX_SIZE (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_MAX_CONNECTIONS +#define MYNEWT_VAL_BLE_MAX_CONNECTIONS CONFIG_BT_NIMBLE_MAX_CONNECTIONS +#endif + +#ifndef MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES +#ifdef CONFIG_BT_NIMBLE_EXT_ADV +#define MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES (CONFIG_BT_NIMBLE_MAX_EXT_ADV_INSTANCES) +#else +#define MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_MAX_PERIODIC_SYNCS +#ifdef CONFIG_BT_NIMBLE_ENABLE_PERIODIC_ADV +#define MYNEWT_VAL_BLE_MAX_PERIODIC_SYNCS (CONFIG_BT_NIMBLE_MAX_PERIODIC_SYNCS) +#else +#define MYNEWT_VAL_BLE_MAX_PERIODIC_SYNCS (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_PERIODIC_ADV +#ifdef CONFIG_BT_NIMBLE_EXT_ADV +#define MYNEWT_VAL_BLE_PERIODIC_ADV (CONFIG_BT_NIMBLE_ENABLE_PERIODIC_ADV) +#else +#define MYNEWT_VAL_BLE_PERIODIC_ADV (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_PERIODIC_ADV_SYNC_TRANSFER +#define MYNEWT_VAL_BLE_PERIODIC_ADV_SYNC_TRANSFER (0) +#endif + +#ifndef MYNEWT_VAL_BLE_ROLE_BROADCASTER +#ifdef CONFIG_BT_NIMBLE_ROLE_BROADCASTER +#define MYNEWT_VAL_BLE_ROLE_BROADCASTER (1) +#else +#define MYNEWT_VAL_BLE_ROLE_BROADCASTER (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_ROLE_CENTRAL +#ifdef CONFIG_BT_NIMBLE_ROLE_CENTRAL +#define MYNEWT_VAL_BLE_ROLE_CENTRAL (1) +#else +#define MYNEWT_VAL_BLE_ROLE_CENTRAL (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_ROLE_OBSERVER +#ifdef CONFIG_BT_NIMBLE_ROLE_OBSERVER +#define MYNEWT_VAL_BLE_ROLE_OBSERVER (1) +#else +#define MYNEWT_VAL_BLE_ROLE_OBSERVER (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_ROLE_PERIPHERAL +#ifdef CONFIG_BT_NIMBLE_ROLE_PERIPHERAL +#define MYNEWT_VAL_BLE_ROLE_PERIPHERAL (1) +#else +#define MYNEWT_VAL_BLE_ROLE_PERIPHERAL (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_VERSION +#define MYNEWT_VAL_BLE_VERSION (50) +#endif + +#ifndef MYNEWT_VAL_BLE_WHITELIST +#define MYNEWT_VAL_BLE_WHITELIST (1) +#endif + +/* Overridden by @apache-mynewt-nimble/nimble/controller (defined by @apache-mynewt-nimble/nimble/controller) */ +#ifndef MYNEWT_VAL_BLE_HW_WHITELIST_ENABLE +#define MYNEWT_VAL_BLE_HW_WHITELIST_ENABLE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_ADD_STRICT_SCHED_PERIODS +#define MYNEWT_VAL_BLE_LL_ADD_STRICT_SCHED_PERIODS (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_CONN_PARAM_REQ +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_CONN_PARAM_REQ (1) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_DATA_LEN_EXT +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_DATA_LEN_EXT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_EXT_SCAN_FILT +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_EXT_SCAN_FILT (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_2M_PHY +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_2M_PHY (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY (0) +#endif + +/* Overridden by @apache-mynewt-nimble/nimble/controller (defined by @apache-mynewt-nimble/nimble/controller) */ +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CSA2 +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CSA2 (1) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION (1) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV (MYNEWT_VAL_BLE_EXT_ADV) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY CONFIG_BT_NIMBLE_ENABLE_PRIVACY +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_SLAVE_INIT_FEAT_XCHG +#define MYNEWT_VAL_BLE_LL_CFG_FEAT_SLAVE_INIT_FEAT_XCHG (1) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_MAX_TX_BYTES +#define MYNEWT_VAL_BLE_LL_CONN_INIT_MAX_TX_BYTES (27) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_MIN_WIN_OFFSET +#define MYNEWT_VAL_BLE_LL_CONN_INIT_MIN_WIN_OFFSET (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_SLOTS +#define MYNEWT_VAL_BLE_LL_CONN_INIT_SLOTS (4) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_DIRECT_TEST_MODE +#define MYNEWT_VAL_BLE_LL_DIRECT_TEST_MODE (0) +#endif + +/* Overridden by @apache-mynewt-nimble/nimble/controller (defined by @apache-mynewt-nimble/nimble/controller) */ +#ifndef MYNEWT_VAL_BLE_LL_EXT_ADV_AUX_PTR_CNT +#define MYNEWT_VAL_BLE_LL_EXT_ADV_AUX_PTR_CNT (5) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_MASTER_SCA +#define MYNEWT_VAL_BLE_LL_MASTER_SCA (4) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE +#define MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE (251) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_MFRG_ID +#define MYNEWT_VAL_BLE_LL_MFRG_ID (0xFFFF) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS +#define MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS (8) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS +#define MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS (8) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_OUR_SCA +#define MYNEWT_VAL_BLE_LL_OUR_SCA (60) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_SCA +#define MYNEWT_VAL_BLE_LL_SCA (60) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_PRIO +#define MYNEWT_VAL_BLE_LL_PRIO (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE +#if CONFIG_BT_NIMBLE_MAX_BONDS +#define MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE (4) +#else +#define MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE (0) +#endif +#endif + +#ifndef MYNEWT_VAL_BLE_LL_RNG_BUFSIZE +#define MYNEWT_VAL_BLE_LL_RNG_BUFSIZE (32) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_STRICT_CONN_SCHEDULING +#define MYNEWT_VAL_BLE_LL_STRICT_CONN_SCHEDULING (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_SUPP_MAX_RX_BYTES +#define MYNEWT_VAL_BLE_LL_SUPP_MAX_RX_BYTES (MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_SUPP_MAX_TX_BYTES +#define MYNEWT_VAL_BLE_LL_SUPP_MAX_TX_BYTES (MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_SYSVIEW +#define MYNEWT_VAL_BLE_LL_SYSVIEW (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_TX_PWR_DBM +#define MYNEWT_VAL_BLE_LL_TX_PWR_DBM (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_USECS_PER_PERIOD +#define MYNEWT_VAL_BLE_LL_USECS_PER_PERIOD (3250) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_VND_EVENT_ON_ASSERT +#define MYNEWT_VAL_BLE_LL_VND_EVENT_ON_ASSERT (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_WHITELIST_SIZE +#define MYNEWT_VAL_BLE_LL_WHITELIST_SIZE (8) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_NUM_COMP_PKT_ITVL_MS +#define MYNEWT_VAL_BLE_LL_NUM_COMP_PKT_ITVL_MS (2000) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_SCHED_AUX_MAFS_DELAY +#define MYNEWT_VAL_BLE_LL_SCHED_AUX_MAFS_DELAY (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_SCHED_AUX_CHAIN_MAFS_DELAY +#define MYNEWT_VAL_BLE_LL_SCHED_AUX_CHAIN_MAFS_DELAY (0) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_SCHED_SCAN_AUX_PDU_LEN +#define MYNEWT_VAL_BLE_LL_SCHED_SCAN_AUX_PDU_LEN (41) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_SCHED_SCAN_SYNC_PDU_LEN +#define MYNEWT_VAL_BLE_LL_SCHED_SCAN_SYNC_PDU_LEN (32) +#endif + +#ifndef MYNEWT_VAL_BLE_LP_CLOCK +#define MYNEWT_VAL_BLE_LP_CLOCK (1) +#endif + +#ifndef MYNEWT_VAL_BLE_NUM_COMP_PKT_RATE +#define MYNEWT_VAL_BLE_NUM_COMP_PKT_RATE ((2 * OS_TICKS_PER_SEC)) +#endif + +#ifndef MYNEWT_VAL_BLE_PUBLIC_DEV_ADDR +#define MYNEWT_VAL_BLE_PUBLIC_DEV_ADDR ((uint8_t[6]){0x00, 0x00, 0x00, 0x00, 0x00, 0x00}) +#endif + +#ifndef MYNEWT_VAL_BLE_LL_RFMGMT_ENABLE_TIME +#define MYNEWT_VAL_BLE_LL_RFMGMT_ENABLE_TIME (1500) +#endif + +/*** @apache-mynewt-nimble/nimble/host */ +#ifndef MYNEWT_VAL_BLE_ATT_PREFERRED_MTU +#define MYNEWT_VAL_BLE_ATT_PREFERRED_MTU CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_FIND_INFO +#define MYNEWT_VAL_BLE_ATT_SVR_FIND_INFO (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_FIND_TYPE +#define MYNEWT_VAL_BLE_ATT_SVR_FIND_TYPE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_INDICATE +#define MYNEWT_VAL_BLE_ATT_SVR_INDICATE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_MAX_PREP_ENTRIES +#define MYNEWT_VAL_BLE_ATT_SVR_MAX_PREP_ENTRIES (5) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_NOTIFY +#define MYNEWT_VAL_BLE_ATT_SVR_NOTIFY (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE +#define MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE_TMO +#define MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE_TMO (30000) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_READ +#define MYNEWT_VAL_BLE_ATT_SVR_READ (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_READ_BLOB +#define MYNEWT_VAL_BLE_ATT_SVR_READ_BLOB (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_READ_GROUP_TYPE +#define MYNEWT_VAL_BLE_ATT_SVR_READ_GROUP_TYPE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_READ_MULT +#define MYNEWT_VAL_BLE_ATT_SVR_READ_MULT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_READ_TYPE +#define MYNEWT_VAL_BLE_ATT_SVR_READ_TYPE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_SIGNED_WRITE +#define MYNEWT_VAL_BLE_ATT_SVR_SIGNED_WRITE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_WRITE +#define MYNEWT_VAL_BLE_ATT_SVR_WRITE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_ATT_SVR_WRITE_NO_RSP +#define MYNEWT_VAL_BLE_ATT_SVR_WRITE_NO_RSP (1) +#endif + +#ifndef MYNEWT_VAL_BLE_GAP_MAX_PENDING_CONN_PARAM_UPDATE +#define MYNEWT_VAL_BLE_GAP_MAX_PENDING_CONN_PARAM_UPDATE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_DISC_ALL_CHRS +#define MYNEWT_VAL_BLE_GATT_DISC_ALL_CHRS (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_DISC_ALL_DSCS +#define MYNEWT_VAL_BLE_GATT_DISC_ALL_DSCS (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_DISC_ALL_SVCS +#define MYNEWT_VAL_BLE_GATT_DISC_ALL_SVCS (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_DISC_CHR_UUID +#define MYNEWT_VAL_BLE_GATT_DISC_CHR_UUID (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_DISC_SVC_UUID +#define MYNEWT_VAL_BLE_GATT_DISC_SVC_UUID (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_FIND_INC_SVCS +#define MYNEWT_VAL_BLE_GATT_FIND_INC_SVCS (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_INDICATE +#define MYNEWT_VAL_BLE_GATT_INDICATE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_MAX_PROCS +#define MYNEWT_VAL_BLE_GATT_MAX_PROCS (4) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_NOTIFY +#define MYNEWT_VAL_BLE_GATT_NOTIFY (1) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_READ +#define MYNEWT_VAL_BLE_GATT_READ (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_READ_LONG +#define MYNEWT_VAL_BLE_GATT_READ_LONG (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_READ_MAX_ATTRS +#define MYNEWT_VAL_BLE_GATT_READ_MAX_ATTRS (4) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_READ_MULT +#define MYNEWT_VAL_BLE_GATT_READ_MULT (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_READ_UUID +#define MYNEWT_VAL_BLE_GATT_READ_UUID (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_RESUME_RATE +#define MYNEWT_VAL_BLE_GATT_RESUME_RATE (1000) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_SIGNED_WRITE +#define MYNEWT_VAL_BLE_GATT_SIGNED_WRITE (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_WRITE +#define MYNEWT_VAL_BLE_GATT_WRITE (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_WRITE_LONG +#define MYNEWT_VAL_BLE_GATT_WRITE_LONG (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_WRITE_MAX_ATTRS +#define MYNEWT_VAL_BLE_GATT_WRITE_MAX_ATTRS (4) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_WRITE_NO_RSP +#define MYNEWT_VAL_BLE_GATT_WRITE_NO_RSP (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_GATT_WRITE_RELIABLE +#define MYNEWT_VAL_BLE_GATT_WRITE_RELIABLE (MYNEWT_VAL_BLE_ROLE_CENTRAL) +#endif + +#ifndef MYNEWT_VAL_BLE_HOST +#define MYNEWT_VAL_BLE_HOST (1) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_AUTO_START +#define MYNEWT_VAL_BLE_HS_AUTO_START (1) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_DEBUG +#define MYNEWT_VAL_BLE_HS_DEBUG (0) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL +#define MYNEWT_VAL_BLE_HS_FLOW_CTRL (0) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL_ITVL +#define MYNEWT_VAL_BLE_HS_FLOW_CTRL_ITVL (1000) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL_THRESH +#define MYNEWT_VAL_BLE_HS_FLOW_CTRL_THRESH (2) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL_TX_ON_DISCONNECT +#define MYNEWT_VAL_BLE_HS_FLOW_CTRL_TX_ON_DISCONNECT (0) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_LOG_LVL +#define MYNEWT_VAL_BLE_HS_LOG_LVL CONFIG_BT_NIMBLE_LOG_LEVEL +#endif + +#ifndef MYNEWT_VAL_BLE_HS_LOG_MOD +#define MYNEWT_VAL_BLE_HS_LOG_MOD (4) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_PHONY_HCI_ACKS +#define MYNEWT_VAL_BLE_HS_PHONY_HCI_ACKS (0) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_REQUIRE_OS +#define MYNEWT_VAL_BLE_HS_REQUIRE_OS (1) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_STOP_ON_SHUTDOWN +#define MYNEWT_VAL_BLE_HS_STOP_ON_SHUTDOWN (1) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_STOP_ON_SHUTDOWN_TIMEOUT +#define MYNEWT_VAL_BLE_HS_STOP_ON_SHUTDOWN_TIMEOUT (2000) +#endif + +#ifndef MYNEWT_VAL_BLE_HS_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_HS_SYSINIT_STAGE (200) +#endif + +#ifndef MYNEWT_VAL_BLE_L2CAP_COC_MAX_NUM +#define MYNEWT_VAL_BLE_L2CAP_COC_MAX_NUM (0) +#endif + +#ifndef MYNEWT_VAL_BLE_L2CAP_COC_MPS +#define MYNEWT_VAL_BLE_L2CAP_COC_MPS (MYNEWT_VAL_MSYS_1_BLOCK_SIZE-8) +#endif + +#ifndef MYNEWT_VAL_BLE_L2CAP_ENHANCED_COC +#define MYNEWT_VAL_BLE_L2CAP_ENHANCED_COC (0) +#endif + +#ifndef MYNEWT_VAL_BLE_L2CAP_JOIN_RX_FRAGS +#define MYNEWT_VAL_BLE_L2CAP_JOIN_RX_FRAGS (1) +#endif + +#ifndef MYNEWT_VAL_BLE_L2CAP_MAX_CHANS +#define MYNEWT_VAL_BLE_L2CAP_MAX_CHANS (3*MYNEWT_VAL_BLE_MAX_CONNECTIONS) +#endif + +#ifndef MYNEWT_VAL_BLE_L2CAP_RX_FRAG_TIMEOUT +#define MYNEWT_VAL_BLE_L2CAP_RX_FRAG_TIMEOUT (30000) +#endif + +#ifndef MYNEWT_VAL_BLE_L2CAP_SIG_MAX_PROCS +#define MYNEWT_VAL_BLE_L2CAP_SIG_MAX_PROCS (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH +#define MYNEWT_VAL_BLE_MESH (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_CONSOLE_BUFFER_SIZE +#define MYNEWT_VAL_BLE_MONITOR_CONSOLE_BUFFER_SIZE (128) +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_RTT +#define MYNEWT_VAL_BLE_MONITOR_RTT (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_RTT_BUFFERED +#define MYNEWT_VAL_BLE_MONITOR_RTT_BUFFERED (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_NAME +#define MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_NAME ("btmonitor") +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_SIZE +#define MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_SIZE (256) +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_UART +#define MYNEWT_VAL_BLE_MONITOR_UART (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_UART_BAUDRATE +#define MYNEWT_VAL_BLE_MONITOR_UART_BAUDRATE (1000000) +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_UART_BUFFER_SIZE +#define MYNEWT_VAL_BLE_MONITOR_UART_BUFFER_SIZE (64) +#endif + +#ifndef MYNEWT_VAL_BLE_MONITOR_UART_DEV +#define MYNEWT_VAL_BLE_MONITOR_UART_DEV ("uart0") +#endif + +#ifndef MYNEWT_VAL_BLE_RPA_TIMEOUT +#define MYNEWT_VAL_BLE_RPA_TIMEOUT (300) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_BONDING +#define MYNEWT_VAL_BLE_SM_BONDING (1) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_IO_CAP +#define MYNEWT_VAL_BLE_SM_IO_CAP (BLE_HS_IO_NO_INPUT_OUTPUT) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_KEYPRESS +#define MYNEWT_VAL_BLE_SM_KEYPRESS (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_LEGACY +#define MYNEWT_VAL_BLE_SM_LEGACY (1) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_MAX_PROCS +#define MYNEWT_VAL_BLE_SM_MAX_PROCS (1) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_MITM +#define MYNEWT_VAL_BLE_SM_MITM (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_OOB_DATA_FLAG +#define MYNEWT_VAL_BLE_SM_OOB_DATA_FLAG (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_OUR_KEY_DIST +#define MYNEWT_VAL_BLE_SM_OUR_KEY_DIST (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_SC +#define MYNEWT_VAL_BLE_SM_SC (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_SC_DEBUG_KEYS +#define MYNEWT_VAL_BLE_SM_SC_DEBUG_KEYS (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SM_THEIR_KEY_DIST +#define MYNEWT_VAL_BLE_SM_THEIR_KEY_DIST (0) +#endif + +#ifndef MYNEWT_VAL_BLE_STORE_MAX_BONDS +#define MYNEWT_VAL_BLE_STORE_MAX_BONDS CONFIG_BT_NIMBLE_MAX_BONDS +#endif + +#ifndef MYNEWT_VAL_BLE_STORE_MAX_CCCDS +#define MYNEWT_VAL_BLE_STORE_MAX_CCCDS CONFIG_BT_NIMBLE_MAX_CCCDS +#endif + +#ifndef MYNEWT_VAL_BLE_STORE_CONFIG_PERSIST +#if CONFIG_BT_NIMBLE_MAX_BONDS +#define MYNEWT_VAL_BLE_STORE_CONFIG_PERSIST (1) +#else +#define MYNEWT_VAL_BLE_STORE_CONFIG_PERSIST (0) +#endif +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/ans */ +#ifndef MYNEWT_VAL_BLE_SVC_ANS_NEW_ALERT_CAT +#define MYNEWT_VAL_BLE_SVC_ANS_NEW_ALERT_CAT (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_ANS_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_ANS_SYSINIT_STAGE (303) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_ANS_UNR_ALERT_CAT +#define MYNEWT_VAL_BLE_SVC_ANS_UNR_ALERT_CAT (0) +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/bas */ +#ifndef MYNEWT_VAL_BLE_SVC_BAS_BATTERY_LEVEL_NOTIFY_ENABLE +#define MYNEWT_VAL_BLE_SVC_BAS_BATTERY_LEVEL_NOTIFY_ENABLE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_BAS_BATTERY_LEVEL_READ_PERM +#define MYNEWT_VAL_BLE_SVC_BAS_BATTERY_LEVEL_READ_PERM (0) +#endif +#ifndef MYNEWT_VAL_BLE_MESH_ADV_TASK_PRIO +#define MYNEWT_VAL_BLE_MESH_ADV_TASK_PRIO (9) +#endif + + +/*** @apache-mynewt-nimble/nimble/host/mesh */ +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_ADV_BUF_COUNT +#define MYNEWT_VAL_BLE_MESH_ADV_BUF_COUNT (20) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_APP_KEY_COUNT +#define MYNEWT_VAL_BLE_MESH_APP_KEY_COUNT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_CFG_CLI +#define MYNEWT_VAL_BLE_MESH_CFG_CLI (0) +#endif +#ifndef MYNEWT_VAL_BLE_MESH_CRPL +#define MYNEWT_VAL_BLE_MESH_CRPL (10) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG +#define MYNEWT_VAL_BLE_MESH_DEBUG (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_ACCESS +#define MYNEWT_VAL_BLE_MESH_DEBUG_ACCESS (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_ADV +#define MYNEWT_VAL_BLE_MESH_DEBUG_ADV (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG +#define MYNEWT_VAL_BLE_MESH_DEBUG (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_ACCESS +#define MYNEWT_VAL_BLE_MESH_DEBUG_ACCESS (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_ADV +#define MYNEWT_VAL_BLE_MESH_DEBUG_ADV (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_BEACON +#define MYNEWT_VAL_BLE_MESH_DEBUG_BEACON (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_CRYPTO +#define MYNEWT_VAL_BLE_MESH_DEBUG_CRYPTO (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_FRIEND +#define MYNEWT_VAL_BLE_MESH_DEBUG_FRIEND (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_LOW_POWER +#define MYNEWT_VAL_BLE_MESH_DEBUG_LOW_POWER (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_MODEL +#define MYNEWT_VAL_BLE_MESH_DEBUG_MODEL (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_NET +#define MYNEWT_VAL_BLE_MESH_DEBUG_NET (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_PROV +#define MYNEWT_VAL_BLE_MESH_DEBUG_PROV (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_PROXY +#define MYNEWT_VAL_BLE_MESH_DEBUG_PROXY (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_SETTINGS +#define MYNEWT_VAL_BLE_MESH_DEBUG_SETTINGS (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_DEBUG_TRANS +#define MYNEWT_VAL_BLE_MESH_DEBUG_TRANS (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_DEVICE_NAME +#define MYNEWT_VAL_BLE_MESH_DEVICE_NAME ("nimble-mesh-node") +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_DEV_UUID +#define MYNEWT_VAL_BLE_MESH_DEV_UUID (((uint8_t[16]){0x11, 0x22, 0})) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_FRIEND +#define MYNEWT_VAL_BLE_MESH_FRIEND (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_FRIEND_LPN_COUNT +#define MYNEWT_VAL_BLE_MESH_FRIEND_LPN_COUNT (2) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_FRIEND_QUEUE_SIZE +#define MYNEWT_VAL_BLE_MESH_FRIEND_QUEUE_SIZE (16) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_FRIEND_RECV_WIN +#define MYNEWT_VAL_BLE_MESH_FRIEND_RECV_WIN (255) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_FRIEND_SEG_RX +#define MYNEWT_VAL_BLE_MESH_FRIEND_SEG_RX (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_FRIEND_SUB_LIST_SIZE +#define MYNEWT_VAL_BLE_MESH_FRIEND_SUB_LIST_SIZE (3) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_GATT_PROXY +#define MYNEWT_VAL_BLE_MESH_GATT_PROXY (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_HEALTH_CLI +#define MYNEWT_VAL_BLE_MESH_HEALTH_CLI (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_IVU_DIVIDER +#define MYNEWT_VAL_BLE_MESH_IVU_DIVIDER (4) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_IV_UPDATE_TEST +#define MYNEWT_VAL_BLE_MESH_IV_UPDATE_TEST (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LABEL_COUNT +#define MYNEWT_VAL_BLE_MESH_LABEL_COUNT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LOW_POWER +#define MYNEWT_VAL_BLE_MESH_LOW_POWER (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_AUTO +#define MYNEWT_VAL_BLE_MESH_LPN_AUTO (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_AUTO_TIMEOUT +#define MYNEWT_VAL_BLE_MESH_LPN_AUTO_TIMEOUT (15) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_ESTABLISHMENT +#define MYNEWT_VAL_BLE_MESH_LPN_ESTABLISHMENT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_GROUPS +#define MYNEWT_VAL_BLE_MESH_LPN_GROUPS (10) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_INIT_POLL_TIMEOUT +#define MYNEWT_VAL_BLE_MESH_LPN_INIT_POLL_TIMEOUT (MYNEWT_VAL_BLE_MESH_LPN_POLL_TIMEOUT) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_MIN_QUEUE_SIZE +#define MYNEWT_VAL_BLE_MESH_LPN_MIN_QUEUE_SIZE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_POLL_TIMEOUT +#define MYNEWT_VAL_BLE_MESH_LPN_POLL_TIMEOUT (300) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_RECV_DELAY +#define MYNEWT_VAL_BLE_MESH_LPN_RECV_DELAY (100) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_RECV_WIN_FACTOR +#define MYNEWT_VAL_BLE_MESH_LPN_RECV_WIN_FACTOR (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_RETRY_TIMEOUT +#define MYNEWT_VAL_BLE_MESH_LPN_RETRY_TIMEOUT (8) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_RSSI_FACTOR +#define MYNEWT_VAL_BLE_MESH_LPN_RSSI_FACTOR (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_LPN_SCAN_LATENCY +#define MYNEWT_VAL_BLE_MESH_LPN_SCAN_LATENCY (10) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_MODEL_GROUP_COUNT +#define MYNEWT_VAL_BLE_MESH_MODEL_GROUP_COUNT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_MODEL_KEY_COUNT +#define MYNEWT_VAL_BLE_MESH_MODEL_KEY_COUNT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_MSG_CACHE_SIZE +#define MYNEWT_VAL_BLE_MESH_MSG_CACHE_SIZE (10) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_NODE_ID_TIMEOUT +#define MYNEWT_VAL_BLE_MESH_NODE_ID_TIMEOUT (60) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_OOB_INPUT_ACTIONS +#define MYNEWT_VAL_BLE_MESH_OOB_INPUT_ACTIONS (((BT_MESH_NO_INPUT))) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_OOB_INPUT_SIZE +#define MYNEWT_VAL_BLE_MESH_OOB_INPUT_SIZE (4) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_OOB_OUTPUT_ACTIONS +#define MYNEWT_VAL_BLE_MESH_OOB_OUTPUT_ACTIONS (((BT_MESH_DISPLAY_NUMBER))) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_OOB_OUTPUT_SIZE +#define MYNEWT_VAL_BLE_MESH_OOB_OUTPUT_SIZE (4) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_PB_ADV +#define MYNEWT_VAL_BLE_MESH_PB_ADV (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_PB_GATT +#define MYNEWT_VAL_BLE_MESH_PB_GATT (1) +#endif + +/* Overridden by @apache-mynewt-nimble/nimble/host/mesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_PROV +#define MYNEWT_VAL_BLE_MESH_PROV (0) +#endif + +/* Overridden by @apache-mynewt-nimble/nimble/host/mesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_PROXY +#define MYNEWT_VAL_BLE_MESH_PROXY (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_PROXY_FILTER_SIZE +#define MYNEWT_VAL_BLE_MESH_PROXY_FILTER_SIZE (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_RELAY +#define MYNEWT_VAL_BLE_MESH_RELAY (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_RPL_STORE_TIMEOUT +#define MYNEWT_VAL_BLE_MESH_RPL_STORE_TIMEOUT (5) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_RX_SDU_MAX +#define MYNEWT_VAL_BLE_MESH_RX_SDU_MAX (72) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_RX_SEG_MSG_COUNT +#define MYNEWT_VAL_BLE_MESH_RX_SEG_MSG_COUNT (2) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_SEQ_STORE_RATE +#define MYNEWT_VAL_BLE_MESH_SEQ_STORE_RATE (128) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_SETTINGS +#define MYNEWT_VAL_BLE_MESH_SETTINGS (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_SHELL +#define MYNEWT_VAL_BLE_MESH_SHELL (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_SHELL_MODELS +#define MYNEWT_VAL_BLE_MESH_SHELL_MODELS (0) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_STORE_TIMEOUT +#define MYNEWT_VAL_BLE_MESH_STORE_TIMEOUT (2) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_SUBNET_COUNT +#define MYNEWT_VAL_BLE_MESH_SUBNET_COUNT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_TESTING +#define MYNEWT_VAL_BLE_MESH_TESTING (0) +#endif + +/* Overridden by apps/blemesh (defined by @apache-mynewt-nimble/nimble/host/mesh) */ +#ifndef MYNEWT_VAL_BLE_MESH_TX_SEG_MAX +#define MYNEWT_VAL_BLE_MESH_TX_SEG_MAX (6) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_TX_SEG_MSG_COUNT +#define MYNEWT_VAL_BLE_MESH_TX_SEG_MSG_COUNT (4) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_ADV_STACK_SIZE +#define MYNEWT_VAL_BLE_MESH_ADV_STACK_SIZE (768) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_PROVISIONER +#define MYNEWT_VAL_BLE_MESH_PROVISIONER (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_NODE_COUNT +#define MYNEWT_VAL_BLE_MESH_NODE_COUNT (1) +#endif + +#ifndef MYNEWT_VAL_BLE_MESH_SEG_RETRANSMIT_ATTEMPTS +#define MYNEWT_VAL_BLE_MESH_SEG_RETRANSMIT_ATTEMPTS (4) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_BAS_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_BAS_SYSINIT_STAGE (303) +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/dis */ +#ifndef MYNEWT_VAL_BLE_SVC_DIS_DEFAULT_READ_PERM +#define MYNEWT_VAL_BLE_SVC_DIS_DEFAULT_READ_PERM (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_FIRMWARE_REVISION_DEFAULT +#define MYNEWT_VAL_BLE_SVC_DIS_FIRMWARE_REVISION_DEFAULT (NULL) +#endif + +/* Value copied from BLE_SVC_DIS_DEFAULT_READ_PERM */ +#ifndef MYNEWT_VAL_BLE_SVC_DIS_FIRMWARE_REVISION_READ_PERM +#define MYNEWT_VAL_BLE_SVC_DIS_FIRMWARE_REVISION_READ_PERM (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_HARDWARE_REVISION_DEFAULT +#define MYNEWT_VAL_BLE_SVC_DIS_HARDWARE_REVISION_DEFAULT (NULL) +#endif + +/* Value copied from BLE_SVC_DIS_DEFAULT_READ_PERM */ +#ifndef MYNEWT_VAL_BLE_SVC_DIS_HARDWARE_REVISION_READ_PERM +#define MYNEWT_VAL_BLE_SVC_DIS_HARDWARE_REVISION_READ_PERM (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_MANUFACTURER_NAME_DEFAULT +#define MYNEWT_VAL_BLE_SVC_DIS_MANUFACTURER_NAME_DEFAULT (NULL) +#endif + +/* Value copied from BLE_SVC_DIS_DEFAULT_READ_PERM */ +#ifndef MYNEWT_VAL_BLE_SVC_DIS_MANUFACTURER_NAME_READ_PERM +#define MYNEWT_VAL_BLE_SVC_DIS_MANUFACTURER_NAME_READ_PERM (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_MODEL_NUMBER_DEFAULT +#define MYNEWT_VAL_BLE_SVC_DIS_MODEL_NUMBER_DEFAULT ("Apache Mynewt NimBLE") +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_MODEL_NUMBER_READ_PERM +#define MYNEWT_VAL_BLE_SVC_DIS_MODEL_NUMBER_READ_PERM (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_SERIAL_NUMBER_DEFAULT +#define MYNEWT_VAL_BLE_SVC_DIS_SERIAL_NUMBER_DEFAULT (NULL) +#endif + +/* Value copied from BLE_SVC_DIS_DEFAULT_READ_PERM */ +#ifndef MYNEWT_VAL_BLE_SVC_DIS_SERIAL_NUMBER_READ_PERM +#define MYNEWT_VAL_BLE_SVC_DIS_SERIAL_NUMBER_READ_PERM (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_SOFTWARE_REVISION_DEFAULT +#define MYNEWT_VAL_BLE_SVC_DIS_SOFTWARE_REVISION_DEFAULT (NULL) +#endif + +/* Value copied from BLE_SVC_DIS_DEFAULT_READ_PERM */ +#ifndef MYNEWT_VAL_BLE_SVC_DIS_SOFTWARE_REVISION_READ_PERM +#define MYNEWT_VAL_BLE_SVC_DIS_SOFTWARE_REVISION_READ_PERM (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_DIS_SYSINIT_STAGE (303) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_DIS_SYSTEM_ID_DEFAULT +#define MYNEWT_VAL_BLE_SVC_DIS_SYSTEM_ID_DEFAULT (NULL) +#endif + +/* Value copied from BLE_SVC_DIS_DEFAULT_READ_PERM */ +#ifndef MYNEWT_VAL_BLE_SVC_DIS_SYSTEM_ID_READ_PERM +#define MYNEWT_VAL_BLE_SVC_DIS_SYSTEM_ID_READ_PERM (-1) +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/gap */ +#ifndef MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE +#define MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE CONFIG_BT_NIMBLE_SVC_GAP_APPEARANCE +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE_WRITE_PERM +#define MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE_WRITE_PERM (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_CENTRAL_ADDRESS_RESOLUTION +#define MYNEWT_VAL_BLE_SVC_GAP_CENTRAL_ADDRESS_RESOLUTION (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME +#define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_MAX_LENGTH +#define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_MAX_LENGTH (31) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_WRITE_PERM +#define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_WRITE_PERM (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_PPCP_MAX_CONN_INTERVAL +#define MYNEWT_VAL_BLE_SVC_GAP_PPCP_MAX_CONN_INTERVAL (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_PPCP_MIN_CONN_INTERVAL +#define MYNEWT_VAL_BLE_SVC_GAP_PPCP_MIN_CONN_INTERVAL (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_PPCP_SLAVE_LATENCY +#define MYNEWT_VAL_BLE_SVC_GAP_PPCP_SLAVE_LATENCY (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_PPCP_SUPERVISION_TMO +#define MYNEWT_VAL_BLE_SVC_GAP_PPCP_SUPERVISION_TMO (0) +#endif + +#ifndef MYNEWT_VAL_BLE_SVC_GAP_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_GAP_SYSINIT_STAGE (301) +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/gatt */ +#ifndef MYNEWT_VAL_BLE_SVC_GATT_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_GATT_SYSINIT_STAGE (302) +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/ias */ +#ifndef MYNEWT_VAL_BLE_SVC_IAS_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_IAS_SYSINIT_STAGE (303) +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/ipss */ +#ifndef MYNEWT_VAL_BLE_SVC_IPSS_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_IPSS_SYSINIT_STAGE (303) +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/lls */ +#ifndef MYNEWT_VAL_BLE_SVC_LLS_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_LLS_SYSINIT_STAGE (303) +#endif + +/*** @apache-mynewt-nimble/nimble/host/services/tps */ +#ifndef MYNEWT_VAL_BLE_SVC_TPS_SYSINIT_STAGE +#define MYNEWT_VAL_BLE_SVC_TPS_SYSINIT_STAGE (303) +#endif + +/*** @apache-mynewt-nimble/nimble/transport/socket */ +#ifndef MYNEWT_VAL_BLE_ACL_BUF_COUNT +#define MYNEWT_VAL_BLE_ACL_BUF_COUNT (4) +#endif + +#ifndef MYNEWT_VAL_BLE_ACL_BUF_SIZE +#define MYNEWT_VAL_BLE_ACL_BUF_SIZE (255) +#endif + +#ifndef MYNEWT_VAL_BLE_HCI_ACL_OUT_COUNT +#define MYNEWT_VAL_BLE_HCI_ACL_OUT_COUNT (2) +#endif + +#ifndef MYNEWT_VAL_BLE_HCI_EVT_BUF_SIZE +#define MYNEWT_VAL_BLE_HCI_EVT_BUF_SIZE (70) +#endif + +#ifndef MYNEWT_VAL_BLE_HCI_EVT_HI_BUF_COUNT +#define MYNEWT_VAL_BLE_HCI_EVT_HI_BUF_COUNT (2) +#endif + +#ifndef MYNEWT_VAL_BLE_HCI_EVT_LO_BUF_COUNT +#define MYNEWT_VAL_BLE_HCI_EVT_LO_BUF_COUNT (8) +#endif + +#ifndef MYNEWT_VAL_BLE_HCI_VS +#define MYNEWT_VAL_BLE_HCI_VS (1) +#endif + +#ifndef MYNEWT_VAL_BLE_PUBLIC_DEV_ADDR +#define MYNEWT_VAL_BLE_PUBLIC_DEV_ADDR ((uint8_t[6]){0x00, 0x00, 0x00, 0x00, 0x00, 0x00}) +#endif + +#if defined(ARDUINO_ARCH_NRF5) && defined(NRF52_SERIES) +#ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_ADDRESS_END_PIN +#define MYNEWT_VAL_BLE_PHY_DBG_TIME_ADDRESS_END_PIN (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_TXRXEN_READY_PIN +#define MYNEWT_VAL_BLE_PHY_DBG_TIME_TXRXEN_READY_PIN (-1) +#endif + +#ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_WFR_PIN +#define MYNEWT_VAL_BLE_PHY_DBG_TIME_WFR_PIN (-1) +#endif +#endif + +/*** newt */ + +#ifndef MYNEWT_VAL_NEWT_FEATURE_LOGCFG +#define MYNEWT_VAL_NEWT_FEATURE_LOGCFG (1) +#endif + +#endif +#endif \ No newline at end of file diff --git a/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c b/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c new file mode 100644 index 0000000..2b727b1 --- /dev/null +++ b/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c @@ -0,0 +1,203 @@ +/* + +Copyright (c) 2009-2018 ARM Limited. All rights reserved. + + SPDX-License-Identifier: Apache-2.0 + +Licensed under the Apache License, Version 2.0 (the License); you may +not use this file except in compliance with the License. +You may obtain a copy of the License at + + www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an AS IS BASIS, WITHOUT +WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. + +NOTICE: This file has been modified by Nordic Semiconductor ASA. + +*/ + +/* NOTE: Template files (including this one) are application specific and therefore expected to + be copied into the application project folder prior to its use! */ + +#include +#include +#include "nrf.h" +#include "nrf_erratas.h" +#include "system_nrf52810.h" + +/*lint ++flb "Enter library region" */ + +#define __SYSTEM_CLOCK_64M (64000000UL) + +#if defined ( __CC_ARM ) + uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M; +#elif defined ( __ICCARM__ ) + __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M; +#elif defined ( __GNUC__ ) + uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M; +#endif + +void SystemCoreClockUpdate(void) +{ + SystemCoreClock = __SYSTEM_CLOCK_64M; +} + +void SystemInit(void) +{ + #if defined (DEVELOP_IN_NRF52832) + /* Workaround for Errata 12 "COMP: Reference ladder not correctly calibrated" found at the Errata document + for nRF52832 device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_12()){ + *(volatile uint32_t *)0x40013540 = (*(uint32_t *)0x10000324 & 0x00001F00) >> 8; + } + #endif + + #if defined (DEVELOP_IN_NRF52832) + /* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document + for nRF52832 device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_16()){ + *(volatile uint32_t *)0x4007C074 = 3131961357ul; + } + #endif + + /* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_31()){ + *(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13; + } + + #if defined (DEVELOP_IN_NRF52832) + /* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document + for nRF52832 device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_32()){ + CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk; + } + #endif + + /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_36()){ + NRF_CLOCK->EVENTS_DONE = 0; + NRF_CLOCK->EVENTS_CTTO = 0; + NRF_CLOCK->CTIV = 0; + } + + #if defined (DEVELOP_IN_NRF52832) + /* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_37()){ + *(volatile uint32_t *)0x400005A0 = 0x3; + } + #endif + + #if defined (DEVELOP_IN_NRF52832) + /* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_57()){ + *(volatile uint32_t *)0x40005610 = 0x00000005; + *(volatile uint32_t *)0x40005688 = 0x00000001; + *(volatile uint32_t *)0x40005618 = 0x00000000; + *(volatile uint32_t *)0x40005614 = 0x0000003F; + } + #endif + + /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_66()){ + NRF_TEMP->A0 = NRF_FICR->TEMP.A0; + NRF_TEMP->A1 = NRF_FICR->TEMP.A1; + NRF_TEMP->A2 = NRF_FICR->TEMP.A2; + NRF_TEMP->A3 = NRF_FICR->TEMP.A3; + NRF_TEMP->A4 = NRF_FICR->TEMP.A4; + NRF_TEMP->A5 = NRF_FICR->TEMP.A5; + NRF_TEMP->B0 = NRF_FICR->TEMP.B0; + NRF_TEMP->B1 = NRF_FICR->TEMP.B1; + NRF_TEMP->B2 = NRF_FICR->TEMP.B2; + NRF_TEMP->B3 = NRF_FICR->TEMP.B3; + NRF_TEMP->B4 = NRF_FICR->TEMP.B4; + NRF_TEMP->B5 = NRF_FICR->TEMP.B5; + NRF_TEMP->T0 = NRF_FICR->TEMP.T0; + NRF_TEMP->T1 = NRF_FICR->TEMP.T1; + NRF_TEMP->T2 = NRF_FICR->TEMP.T2; + NRF_TEMP->T3 = NRF_FICR->TEMP.T3; + NRF_TEMP->T4 = NRF_FICR->TEMP.T4; + } + + /* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_103()){ + NRF_CCM->MAXPACKETSIZE = 0xFBul; + } + + #if defined (DEVELOP_IN_NRF52832) + /* Workaround for Errata 108 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_108()){ + *(volatile uint32_t *)0x40000EE4ul = *(volatile uint32_t *)0x10000258ul & 0x0000004Ful; + } + #endif + + /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_136()){ + if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){ + NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk; + } + } + + #if defined (DEVELOP_IN_NRF52832) + /* Workaround for Errata 182 "RADIO: Fixes for anomalies #102, #106, and #107 do not take effect" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_182()){ + *(volatile uint32_t *) 0x4000173C |= (0x1 << 10); + } + #endif + + /* Workaround for Errata 217 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document + for your device located at https://infocenter.nordicsemi.com/index.jsp */ + if (nrf52_errata_217()){ + *(volatile uint32_t *)0x40000EE4ul |= 0x0000000Ful; + } + + /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not + defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be + reserved for PinReset and not available as normal GPIO. */ + #if defined (CONFIG_GPIO_AS_PINRESET) + if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) || + ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){ + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} + NRF_UICR->PSELRESET[0] = 21; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} + NRF_UICR->PSELRESET[1] = 21; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} + NVIC_SystemReset(); + } + #endif + + /* When developing on an nrf52832, make sure NFC pins are mapped as GPIO. */ + #if defined (DEVELOP_IN_NRF52832) + if (((*((uint32_t *)0x10001200) & (1 << 0)) != 0) || ((*((uint32_t *)0x10001204) & (1 << 0)) != 0)){ + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} + *((uint32_t *)0x10001200) = 0; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} + *((uint32_t *)0x10001204) = 0; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} + NVIC_SystemReset(); + } + #endif + + SystemCoreClockUpdate(); +} + + +/*lint --flb "Leave library region" */ \ No newline at end of file diff --git a/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.h b/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.h new file mode 100644 index 0000000..90fad3f --- /dev/null +++ b/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.h @@ -0,0 +1,46 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef SYSTEM_NRF52810_H +#define SYSTEM_NRF52810_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "system_nrf.h" + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_NRF52810_H */ \ No newline at end of file diff --git a/cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h b/cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h index 2868113..8ff6f4e 100644 --- a/cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h +++ b/cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h @@ -34,6 +34,12 @@ // <<< Use Configuration Wizard in Context Menu >>>\n +#define NRFX_POWER_ENABLED 1 +#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#define NRFX_CLOCK_ENABLED 1 +#define NRFX_NVMC_ENABLED 1 // nrf_nvm_store.c +#define NRFX_CLOCK_CONFIG_LF_SRC 0 // use built-in LF RC by default + // nRF_Drivers // NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver diff --git a/cores/nRF5/wiring_analog_nRF52.c b/cores/nRF5/wiring_analog_nRF52.c index 5b59098..15a3bb3 100644 --- a/cores/nRF5/wiring_analog_nRF52.c +++ b/cores/nRF5/wiring_analog_nRF52.c @@ -31,20 +31,24 @@ static uint32_t saadcGain = SAADC_CH_CONFIG_GAIN_Gain1_5; static NRF_PWM_Type* pwms[PWM_COUNT] = { NRF_PWM0, +#if PWM_COUNT > 1 NRF_PWM1, NRF_PWM2, #if PWM_COUNT > 3 NRF_PWM3 #endif +#endif }; static uint32_t pwmChannelPins[PWM_COUNT] = { 0xFFFFFFFF, +#if PWM_COUNT > 1 0xFFFFFFFF, 0xFFFFFFFF, #if PWM_COUNT > 3 0xFFFFFFFF, #endif +#endif }; static uint16_t pwmChannelSequence[PWM_COUNT]; From 8b3acf1662b66fdf05817e9ac9ac2df93a1faaac Mon Sep 17 00:00:00 2001 From: h2zero Date: Tue, 18 Jun 2024 21:48:03 -0600 Subject: [PATCH 2/8] Adjust config and stack size to conserve RAM. --- cores/nRF5/nimble_config/nrf52810_nimconfig.h | 8 ++++---- cores/nRF5/nordic/linker/gcc_startup_nrf52810.S | 14 +++++++------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/cores/nRF5/nimble_config/nrf52810_nimconfig.h b/cores/nRF5/nimble_config/nrf52810_nimconfig.h index d1ee6ce..1d5dac6 100644 --- a/cores/nRF5/nimble_config/nrf52810_nimconfig.h +++ b/cores/nRF5/nimble_config/nrf52810_nimconfig.h @@ -6,15 +6,15 @@ #else #ifndef CONFIG_BT_NIMBLE_MAX_CONNECTIONS -# define CONFIG_BT_NIMBLE_MAX_CONNECTIONS 3 +# define CONFIG_BT_NIMBLE_MAX_CONNECTIONS 2 #endif #ifndef CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT -#define CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT (12) +#define CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT (8) #endif #ifndef CONFIG_BT_NIMBLE_MAX_BONDS -#define CONFIG_BT_NIMBLE_MAX_BONDS 3 +#define CONFIG_BT_NIMBLE_MAX_BONDS 1 #endif #if CONFIG_BT_NIMBLE_MAX_BONDS @@ -64,7 +64,7 @@ #endif #ifndef CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE -#define CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE 2048 +#define CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE 1408 #endif #ifndef CONFIG_NIMBLE_STACK_USE_MEM_POOLS diff --git a/cores/nRF5/nordic/linker/gcc_startup_nrf52810.S b/cores/nRF5/nordic/linker/gcc_startup_nrf52810.S index 3fc173c..9f2d502 100644 --- a/cores/nRF5/nordic/linker/gcc_startup_nrf52810.S +++ b/cores/nRF5/nordic/linker/gcc_startup_nrf52810.S @@ -1,6 +1,6 @@ #if defined(ARDUINO) && defined(NRF52810_XXAA) /* - + Copyright (c) 2009-2020 ARM Limited. All rights reserved. SPDX-License-Identifier: Apache-2.0 @@ -40,7 +40,7 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA. .equ Stack_Size, __STACK_SIZE #else .align 3 - .equ Stack_Size, 2048 + .equ Stack_Size, 640 #endif .globl __StackTop .globl __StackLimit @@ -217,20 +217,20 @@ __isr_vector: .type Reset_Handler, %function Reset_Handler: - /* Workaround for Errata 185 RAM: RAM corruption at extreme corners + /* Workaround for Errata 185 RAM: RAM corruption at extreme corners * found at the Errata document for your device located * at https://infocenter.nordicsemi.com/index.jsp */ - + LDR R0, =0x10000130 LDR R0, [R0] LDR R1, =0x10000134 LDR R1, [R1] - + CMP R0, #0xA BNE skip CMP R1, #0x0 BNE skip - + LDR R0, =0x40000EE4 LDR R2, [R0] LDR R3, =0xFFFFFF8F @@ -238,7 +238,7 @@ Reset_Handler: LDR R3, =0x00000040 ORRS R2, R2, R3 STR R2, [R0] - + skip: /* Loop to copy data from read only memory to RAM. From 9e485c9c17696ae8b160e394ef67c7b005c02ac6 Mon Sep 17 00:00:00 2001 From: Paul Melnikov Date: Wed, 19 Jun 2024 08:04:01 +0000 Subject: [PATCH 3/8] Add guards in system_nrf52810 file --- cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c b/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c index 2b727b1..4cbf060 100644 --- a/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c +++ b/cores/nRF5/nordic/nrfx/mdk/system_nrf52810.c @@ -23,6 +23,8 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA. /* NOTE: Template files (including this one) are application specific and therefore expected to be copied into the application project folder prior to its use! */ +#if defined(NRF52810_XXAA) + #include #include #include "nrf.h" @@ -200,4 +202,6 @@ void SystemInit(void) } -/*lint --flb "Leave library region" */ \ No newline at end of file +/*lint --flb "Leave library region" */ + +#endif // NRF52810_XXAA \ No newline at end of file From d4007e3eacf03b13a28001689aa6bafe66675965 Mon Sep 17 00:00:00 2001 From: h2zero Date: Wed, 19 Jun 2024 08:39:55 -0600 Subject: [PATCH 4/8] Update linker to allow for user data and bond storage. --- cores/nRF5/nordic/linker/nrf52810_xxaa.ld | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/cores/nRF5/nordic/linker/nrf52810_xxaa.ld b/cores/nRF5/nordic/linker/nrf52810_xxaa.ld index b6be48e..f487697 100644 --- a/cores/nRF5/nordic/linker/nrf52810_xxaa.ld +++ b/cores/nRF5/nordic/linker/nrf52810_xxaa.ld @@ -5,7 +5,9 @@ GROUP(-lgcc -lc -lnosys) MEMORY { - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x30000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x26000 + USER_STORE (rw) : ORIGIN = 0x26000, LENGTH = 0x2000 + BOND_STORE (rw) : ORIGIN = 0x28000, LENGTH = 0x2000 RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x6000 CODE_RAM (rwx) : ORIGIN = 0x800000, LENGTH = 0x6000 } From 735d97bee6104c383d5842ae91964c599f7e7b25 Mon Sep 17 00:00:00 2001 From: h2zero Date: Wed, 19 Jun 2024 08:40:25 -0600 Subject: [PATCH 5/8] Add generic nRF52810 board variant. --- boards.txt | 55 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/boards.txt b/boards.txt index c842433..1645c75 100644 --- a/boards.txt +++ b/boards.txt @@ -1953,3 +1953,58 @@ Waveshare_BLE400.menu.cppDbgLvl.debug.build.cpp_debug=4 Waveshare_BLE400.menu.bootloader.none=No bootloader Waveshare_BLE400.menu.bootloader.none.bootloader.flags= Waveshare_BLE400.menu.bootloader.none.build.bootloader.file=tools/none_bootloader.hex + +# nRF52810 variants +################### + +Generic_nRF52810.name=Generic nRF52810 + +Generic_nRF52810.upload.tool=openocd +Generic_nRF52810.upload.target=nrf52 +Generic_nRF52810.upload.jlink_device=nRF52810_xxAA +Generic_nRF52810.upload.maximum_size=155648 + +Generic_nRF52810.bootloader.tool=openocd + +Generic_nRF52810.build.mcu=cortex-m4 +Generic_nRF52810.build.f_cpu=64000000 +Generic_nRF52810.build.board=GENERIC +Generic_nRF52810.build.core=nRF5 +Generic_nRF52810.build.variant=Generic +Generic_nRF52810.build.variant_system_lib= +Generic_nRF52810.build.float_flags=-mfloat-abi=hard -mfpu=fpv4-sp-d16 +Generic_nRF52810.build.ldscript=nRF52810_xxaa.ld +Generic_nRF52810.build.extra_flags=-DNRF52_SERIES -DnRF52810_XXAA {bootloader.flags} -DCONFIG_NIMBLE_CPP_LOG_LEVEL={build.cpp_debug} {build.nimble_flags} + +Generic_nRF52810.menu.lfclk.lfxo=Crystal Oscillator +Generic_nRF52810.menu.lfclk.lfxo.build.lfclk_flags=-DUSE_LFXO +Generic_nRF52810.menu.lfclk.lfrc=RC Oscillator +Generic_nRF52810.menu.lfclk.lfrc.build.lfclk_flags=-DUSE_LFRC +Generic_nRF52810.menu.lfclk.lfsynt=Synthesized +Generic_nRF52810.menu.lfclk.lfsynt.build.lfclk_flags=-DUSE_LFSYNT + +Generic_nRF52810.menu.role.all=All +Generic_nRF52810.menu.role.all.build.nimble_flags= +Generic_nRF52810.menu.role.periph=Peripheral +Generic_nRF52810.menu.role.periph.build.nimble_flags=-DCONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_OBSERVER_DISABLED +Generic_nRF52810.menu.role.adv=Advertiser +Generic_nRF52810.menu.role.adv.build.nimble_flags=-DCONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_OBSERVER_DISABLED -DCONFIG_BT_NIMBLE_ROLE_PERIPHERAL_DISABLED +Generic_nRF52810.menu.role.scan=Scanner +Generic_nRF52810.menu.role.scan.build.nimble_flags=-DCONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_PERIPHERAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_CENTRAL_DISABLED +Generic_nRF52810.menu.role.central=Client +Generic_nRF52810.menu.role.central.build.nimble_flags=-DCONFIG_BT_NIMBLE_ROLE_PERIPHERAL_DISABLED -DCONFIG_BT_NIMBLE_ROLE_BROADCASTER_DISABLED + +Generic_nRF52810.menu.cppDbgLvl.none=None +Generic_nRF52810.menu.cppDbgLvl.none.build.cpp_debug=0 +Generic_nRF52810.menu.cppDbgLvl.error=Error +Generic_nRF52810.menu.cppDbgLvl.error.build.cpp_debug=1 +Generic_nRF52810.menu.cppDbgLvl.warn=Warn +Generic_nRF52810.menu.cppDbgLvl.warn.build.cpp_debug=2 +Generic_nRF52810.menu.cppDbgLvl.info=Info +Generic_nRF52810.menu.cppDbgLvl.info.build.cpp_debug=3 +Generic_nRF52810.menu.cppDbgLvl.debug=Debug +Generic_nRF52810.menu.cppDbgLvl.debug.build.cpp_debug=4 + +Generic_nRF52810.menu.bootloader.none=No bootloader +Generic_nRF52810.menu.bootloader.none.bootloader.flags= +Generic_nRF52810.menu.bootloader.none.build.bootloader.file=tools/none_bootloader.hex From 75e32f41c612f47d6575069b5a393adb10c4d45a Mon Sep 17 00:00:00 2001 From: h2zero Date: Wed, 19 Jun 2024 09:21:56 -0600 Subject: [PATCH 6/8] Remove float flags. --- boards.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.txt b/boards.txt index 1645c75..474c4ae 100644 --- a/boards.txt +++ b/boards.txt @@ -1972,7 +1972,7 @@ Generic_nRF52810.build.board=GENERIC Generic_nRF52810.build.core=nRF5 Generic_nRF52810.build.variant=Generic Generic_nRF52810.build.variant_system_lib= -Generic_nRF52810.build.float_flags=-mfloat-abi=hard -mfpu=fpv4-sp-d16 +Generic_nRF52810.build.float_flags= Generic_nRF52810.build.ldscript=nRF52810_xxaa.ld Generic_nRF52810.build.extra_flags=-DNRF52_SERIES -DnRF52810_XXAA {bootloader.flags} -DCONFIG_NIMBLE_CPP_LOG_LEVEL={build.cpp_debug} {build.nimble_flags} From 7b0c3a7991ce767fee22fb0e3be9730f5a42f048 Mon Sep 17 00:00:00 2001 From: Paul Melnikov Date: Wed, 19 Jun 2024 21:59:44 +0000 Subject: [PATCH 7/8] Respect USE_LFRC/LFXO/LFSYNT flags; reduce RAM usage even more --- cores/nRF5/nimble_config/nrf52810_nimconfig.h | 6 +++--- cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h | 14 +++++++++++--- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/cores/nRF5/nimble_config/nrf52810_nimconfig.h b/cores/nRF5/nimble_config/nrf52810_nimconfig.h index 1d5dac6..d8b3edc 100644 --- a/cores/nRF5/nimble_config/nrf52810_nimconfig.h +++ b/cores/nRF5/nimble_config/nrf52810_nimconfig.h @@ -1,8 +1,8 @@ #ifndef _NRF52810_CONFIG_H #define _NRF52810_CONFIG_H -#if !defined(NRF52810_XXAA) && !defined(NRF52810_XXAB) -#error NRF52810_XXAA/B not defined +#if !defined(NRF52810_XXAA) +#error NRF52810_XXAA not defined #else #ifndef CONFIG_BT_NIMBLE_MAX_CONNECTIONS @@ -109,7 +109,7 @@ #endif #ifndef MYNEWT_VAL_MSYS_1_BLOCK_SIZE -#define MYNEWT_VAL_MSYS_1_BLOCK_SIZE (292) +#define MYNEWT_VAL_MSYS_1_BLOCK_SIZE (88) #endif #ifndef MYNEWT_VAL_MSYS_2_BLOCK_COUNT diff --git a/cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h b/cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h index 8ff6f4e..712499d 100644 --- a/cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h +++ b/cores/nRF5/nordic/nrfx/nrfx_config_nrf52810.h @@ -37,8 +37,16 @@ #define NRFX_POWER_ENABLED 1 #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 7 #define NRFX_CLOCK_ENABLED 1 -#define NRFX_NVMC_ENABLED 1 // nrf_nvm_store.c -#define NRFX_CLOCK_CONFIG_LF_SRC 0 // use built-in LF RC by default +#define NRFX_NVMC_ENABLED 1 // needed by nrf_nvm_store.c + +#if defined(USE_LFRC) +#define NRFX_CLOCK_CONFIG_LF_SRC 0 +#define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 1 +#elif defined(USE_LFXO) +#define NRFX_CLOCK_CONFIG_LF_SRC 1 +#elif defined(USE_LFSYNT) +#define NRFX_CLOCK_CONFIG_LF_SRC 2 +#endif // nRF_Drivers @@ -56,7 +64,7 @@ // <196609=> External Full Swing #ifndef NRFX_CLOCK_CONFIG_LF_SRC -#define NRFX_CLOCK_CONFIG_LF_SRC 1 +#define NRFX_CLOCK_CONFIG_LF_SRC 0 #endif // NRFX_CLOCK_CONFIG_LF_CAL_ENABLED - Enables LF Clock Calibration Support From f04d9729dcad40f4698ff577f2f994243bec94f5 Mon Sep 17 00:00:00 2001 From: h2zero Date: Thu, 20 Jun 2024 13:46:42 -0600 Subject: [PATCH 8/8] Fix max size --- boards.txt | 2 +- cores/nRF5/nordic/linker/nrf52810_xxaa.ld | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/boards.txt b/boards.txt index 474c4ae..9e644f7 100644 --- a/boards.txt +++ b/boards.txt @@ -1962,7 +1962,7 @@ Generic_nRF52810.name=Generic nRF52810 Generic_nRF52810.upload.tool=openocd Generic_nRF52810.upload.target=nrf52 Generic_nRF52810.upload.jlink_device=nRF52810_xxAA -Generic_nRF52810.upload.maximum_size=155648 +Generic_nRF52810.upload.maximum_size=180224 Generic_nRF52810.bootloader.tool=openocd diff --git a/cores/nRF5/nordic/linker/nrf52810_xxaa.ld b/cores/nRF5/nordic/linker/nrf52810_xxaa.ld index f487697..9f43db4 100644 --- a/cores/nRF5/nordic/linker/nrf52810_xxaa.ld +++ b/cores/nRF5/nordic/linker/nrf52810_xxaa.ld @@ -5,9 +5,9 @@ GROUP(-lgcc -lc -lnosys) MEMORY { - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x26000 - USER_STORE (rw) : ORIGIN = 0x26000, LENGTH = 0x2000 - BOND_STORE (rw) : ORIGIN = 0x28000, LENGTH = 0x2000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x2C000 + USER_STORE (rw) : ORIGIN = 0x2C000, LENGTH = 0x2000 + BOND_STORE (rw) : ORIGIN = 0x2E000, LENGTH = 0x2000 RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x6000 CODE_RAM (rwx) : ORIGIN = 0x800000, LENGTH = 0x6000 }