Update current progress

sameer · sameer · commit 0f922ede74bf · 2020-04-26T22:23:32.000-04:00
diff --git a/.gitignore b/.gitignore
@@ -41,3 +41,7 @@ work/
 ip_cores/
 *.jam
 *.svf
+greybox_tmp/
+*.qip
+*.ppf
+qmegawiz_errors_log.txt
diff --git a/pll/mem_pll.v b/pll/mem_pll.v
@@ -91,9 +91,9 @@ module mem_pll (
 				.vcounderrange ());
 	defparam
 		altpll_component.bandwidth_type = "AUTO",
-		altpll_component.clk0_divide_by = 48,
+		altpll_component.clk0_divide_by = 12,
 		altpll_component.clk0_duty_cycle = 50,
-		altpll_component.clk0_multiply_by = 143,
+		altpll_component.clk0_multiply_by = 25,
 		altpll_component.clk0_phase_shift = "0",
 		altpll_component.compensate_clock = "CLK0",
 		altpll_component.inclk0_input_frequency = 20833,
@@ -169,7 +169,7 @@ endmodule
 // Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any"
 // Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
 // Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "143.000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "100.000000"
 // Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
 // Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
 // Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
@@ -194,7 +194,7 @@ endmodule
 // Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
 // Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
 // Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
-// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "143.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
 // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
 // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
 // Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
@@ -233,9 +233,9 @@ endmodule
 // Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
 // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
 // Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
-// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "48"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "12"
 // Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
-// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "143"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "25"
 // Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
 // Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
 // Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20833"
diff --git a/top/mkrvidor4000/Manifest.py b/top/mkrvidor4000/Manifest.py
@@ -1,6 +1,5 @@
 files = [
     "mkrvidor4000_top.sv",
-    "MIPI_RX_ST.v",
     "arbiter.sv"
 ]
 
@@ -11,7 +10,7 @@
         "git@github.com:hdl-util/vga-text-mode.git::master",
         "git@github.com:hdl-util/mipi-ccs.git::master",
         "git@github.com:hdl-util/mipi-csi-2.git::master",
-        "git@github.com:hdl-util/as4c4m16sa.git::master",
+        "git@github.com:hdl-util/sdram-controller.git::master",
     ]
 }
 
diff --git a/top/mkrvidor4000/arbiter.sv b/top/mkrvidor4000/arbiter.sv
@@ -28,7 +28,8 @@ logic [15:0] data_read;
 logic data_read_valid;
 logic data_write_done;
 
-as4c4m16sa #(
+as4c4m16sa_controller #(
+    .CLK_RATE(100_000_000),
     .SPEED_GRADE(7),
     .READ_BURST_LENGTH(8),
     .WRITE_BURST(1),
@@ -52,86 +53,144 @@ as4c4m16sa #(
     .dq(dq),
 );
 
-logic [15:0] mipi_buffer [0:31];
-logic [4:0] mipi_producer = 5'd0;
-logic [4:0] mipi_consumer = 5'd0;
+logic [31:0] mipi_buff_data;
+logic [3:0] mipi_buff_used;
+logic mipi_buff_read = 1'b0;
+dcfifo mipi_dcfifo (
+            .data ({mipi_data[3], mipi_data[2], mipi_data[1], mipi_data[0]}),
+            .rdclk (sdram_clk),
+            .rdreq (mipi_buff_read),
+            .wrclk (mipi_clk),
+            .wrreq (mipi_data_enable),
+            .q (mipi_buff_data),
+            .rdempty (),
+            .wrusedw (),
+            .aclr (),
+            .eccstatus (),
+            .rdfull (),
+            .rdusedw (mipi_buff_used),
+            .wrempty (),
+            .wrfull ());
+defparam
+    mipi_dcfifo.intended_device_family = "Cyclone 10 LP",
+    mipi_dcfifo.lpm_numwords = 16,
+    mipi_dcfifo.lpm_showahead = "ON",
+    mipi_dcfifo.lpm_type = "dcfifo",
+    mipi_dcfifo.lpm_width = 32,
+    mipi_dcfifo.lpm_widthu = 4,
+    mipi_dcfifo.overflow_checking = "ON",
+    mipi_dcfifo.rdsync_delaypipe = 4,
+    mipi_dcfifo.underflow_checking = "ON",
+    mipi_dcfifo.use_eab = "ON",
+    mipi_dcfifo.wrsync_delaypipe = 4;
 
-always @(posedge mipi_clk)
-begin
-    if (mipi_data_enable)
-    begin
-        mipi_buffer[mipi_producer] <= {mipi_data[0], mipi_data[1]};
-        mipi_buffer[mipi_producer + 1'd1] <= {mipi_data[2], mipi_data[3]};
-        mipi_producer <= mipi_producer + 5'd2;
-    end
-end
-
-
-logic [15:0] pixel_buffer [0:31];
-logic [4:0] pixel_producer = 5'd0;
-logic [4:0] pixel_consumer = 5'd0;
-logic pixel_countup = 1'd0;
-assign pixel = pixel_countup ? pixel_buffer[pixel_consumer][15:8] : pixel_buffer[pixel_consumer][7:0];
-
-always @(posedge pixel_clk)
-begin
-    if (pixel_enable)
-    begin
-        if (pixel_countup == 1'd1)
-            pixel_consumer <= pixel_consumer + 1'd1;
-        pixel_countup <= !pixel_countup;
-    end
-end
 
-logic [4:0] mipi_diff;
-assign mipi_diff = mipi_producer >= mipi_consumer ? mipi_producer - mipi_consumer : (~5'd0 - mipi_consumer) + mipi_producer;
-logic [4:0] pixel_diff;
-assign pixel_diff = pixel_producer >= pixel_consumer ? pixel_producer - pixel_consumer : (~5'd0 - pixel_consumer) + pixel_producer;
+logic [21:0] mipi_address = 22'd0;
+logic [21:0] pixel_address = 22'd0;
+logic [2:0] sdram_countup = 3'd0;
 
-logic [17:0] mipi_address;
-logic [17:0] pixel_address;
+logic pixel_buff_write = 1'b0;
+logic [15:0] pixel_buff_data = 16'd0;
+logic [4:0] pixel_buff_used;
 
-logic [2:0] sdram_countup = 3'd0;
 always @(posedge sdram_clk)
 begin
+    mipi_buff_read <= 1'b0;
+    pixel_buff_write <= 1'b0;
+    pixel_buff_data <= 16'dx;
     if (command == 2'd0)
     begin
-        if (pixel_diff < 5'd8) // Read is approaching starvation
+        if (!pixel_buff_used[4]) // Read burst possible
         begin
             command <= 2'd2;
+            data_write <= 16'dx;
             data_address <= pixel_address;
+            sdram_countup <= 1'd0;
         end
-        else if (mipi_diff >= 5'd15) // Ready to write
+        else if (mipi_buff_used[3]) // Write burst possible
         begin
             command <= 2'd1;
-            data_write <= mipi_buffer[mipi_consumer];
+            data_write <= mipi_buff_data[15:0];
             data_address <= mipi_address;
-            mipi_consumer <= mipi_consumer + 1'd1;
-            sdram_countup <= sdram_countup + 1'd1;
+            sdram_countup <= 1'd1;
+        end
+        else // Idle
+        begin
+            command <= 2'd0;
+            data_write <= 16'dx;
+            data_address <= 22'dx;
+            sdram_countup <= 3'dx;
         end
     end
     else if (command == 2'd2 && data_read_valid)
     begin
-        pixel_buffer[pixel_producer] <= data_read;
-        pixel_producer <= pixel_producer + 1'd1;
+        pixel_buff_data <= data_read;
+        pixel_buff_write <= 1'b1;
         sdram_countup <= sdram_countup + 1'd1;
         if (sdram_countup == 3'd7) // Last read
         begin
             command <= 2'd0;
-            pixel_address <= pixel_address + 8'd8 == 18'(VIDEO_END) ? 18'd0 : pixel_address + 18'd8;
+            pixel_address <= pixel_address + 22'd8 == 22'(VIDEO_END) ? 22'd0 : pixel_address + 22'd8;
         end
     end
     else if (command == 2'd1 && data_write_done)
     begin
-        data_write <= mipi_buffer[mipi_consumer];
-        mipi_consumer <= mipi_consumer + 1'd1;
         sdram_countup <= sdram_countup + 1'd1;
+        if (sdram_countup[0])
+        begin
+            data_write <= mipi_buff_data[31:16];
+            mipi_buff_read <= 1'b1;
+        end
+        else
+        begin
+            data_write <= mipi_buff_data[15:0];
+            mipi_buff_read <= 1'b0;
+        end
+
         if (sdram_countup == 3'd7) // Last write
         begin
             command <= 2'd0;
-            mipi_address <= mipi_address + 8'd8 == 18'(VIDEO_END) ? 18'd0 : mipi_address + 18'd8;
+            mipi_address <= mipi_address + 22'd8 == 22'(VIDEO_END) ? 22'd0 : mipi_address + 22'd8;
         end
     end
 end
 
+
+logic [15:0] internal_pixel;
+logic pixel_countup = 1'd0;
+assign pixel = pixel_countup ? internal_pixel[15:8] : internal_pixel[7:0];
+always @(posedge pixel_clk)
+begin
+    if (pixel_enable) 
+        pixel_countup <= !pixel_countup;
+end
+
+dcfifo pixel_dcfifo (
+            .data (pixel_buff_data),
+            .rdclk (pixel_clk),
+            .rdreq (pixel_enable && pixel_countup == 1'b1),
+            .wrclk (sdram_clk),
+            .wrreq (pixel_buff_write),
+            .q (internal_pixel),
+            .rdempty (),
+            .wrusedw (pixel_buff_used),
+            .aclr (),
+            .eccstatus (),
+            .rdfull (),
+            .rdusedw (),
+            .wrempty (),
+            .wrfull ());
+defparam
+    pixel_dcfifo.intended_device_family = "Cyclone 10 LP",
+    pixel_dcfifo.lpm_numwords = 32,
+    pixel_dcfifo.lpm_showahead = "ON",
+    pixel_dcfifo.lpm_type = "dcfifo",
+    pixel_dcfifo.lpm_width = 16,
+    pixel_dcfifo.lpm_widthu = 5,
+    pixel_dcfifo.overflow_checking = "ON",
+    pixel_dcfifo.rdsync_delaypipe = 4,
+    pixel_dcfifo.underflow_checking = "ON",
+    pixel_dcfifo.use_eab = "ON",
+    pixel_dcfifo.wrsync_delaypipe = 4;
+
 endmodule
diff --git a/top/mkrvidor4000/mkrvidor4000_top.sv b/top/mkrvidor4000/mkrvidor4000_top.sv
@@ -100,38 +100,34 @@ module mkrvidor4000_top
 
 );
 
-// signal declaration
-wire OSC_CLK;
-
-wire FLASH_CLK;
-
 // internal oscillator
+wire OSC_CLK;
 cyclone10lp_oscillator osc ( 
     .clkout(OSC_CLK),
     .oscena(1'b1)
 );
 
-mem_pll mem_pll (
-    .inclk0(CLK_48MHZ),
-    .c0(SDRAM_CLK)
-);
+// mem_pll mem_pll (
+//     .inclk0(CLK_48MHZ),
+//     .c0(SDRAM_CLK)
+// );
 
 wire clk_pixel_x5;
 wire clk_pixel;
 wire clk_audio;
+assign SDRAM_CLK = clk_pixel_x5;
 hdmi_pll hdmi_pll(.inclk0(CLK_48MHZ), .c0(clk_pixel), .c1(clk_pixel_x5), .c2(clk_audio));
 
 localparam AUDIO_BIT_WIDTH = 16;
 localparam AUDIO_RATE = 48000;
 localparam WAVE_RATE = 480;
 
-logic [AUDIO_BIT_WIDTH-1:0] audio_sample_word;
+logic [AUDIO_BIT_WIDTH-1:0] audio_sample_word = AUDIO_BIT_WIDTH'(0);
 // sawtooth #(.BIT_WIDTH(AUDIO_BIT_WIDTH), .SAMPLE_RATE(AUDIO_RATE), .WAVE_RATE(WAVE_RATE)) sawtooth (.clk_audio(clk_audio), .level(audio_sample_word));
 
 logic [23:0] rgb;
 logic [9:0] cx, cy, screen_start_x, screen_start_y;
-hdmi #(.VIDEO_ID_CODE(1),
-.DDRIO(1), .AUDIO_RATE(AUDIO_RATE), .AUDIO_BIT_WIDTH(AUDIO_BIT_WIDTH)) hdmi(.clk_pixel_x10(clk_pixel_x5), .clk_pixel(clk_pixel), .clk_audio(clk_audio), .rgb(rgb), .audio_sample_word('{audio_sample_word, audio_sample_word}), .tmds_p(HDMI_TX), .tmds_clock_p(HDMI_CLK), .tmds_n(HDMI_TX_N), .tmds_clock_n(HDMI_CLK_N), .cx(cx), .cy(cy), .screen_start_x(screen_start_x), .screen_start_y(screen_start_y));
+hdmi #(.VIDEO_ID_CODE(1), .DDRIO(1), .AUDIO_RATE(AUDIO_RATE), .AUDIO_BIT_WIDTH(AUDIO_BIT_WIDTH)) hdmi(.clk_pixel_x10(clk_pixel_x5), .clk_pixel(clk_pixel), .clk_audio(clk_audio), .rgb(rgb), .audio_sample_word('{audio_sample_word, audio_sample_word}), .tmds_p(HDMI_TX), .tmds_clock_p(HDMI_CLK), .tmds_n(HDMI_TX_N), .tmds_clock_n(HDMI_CLK_N), .cx(cx), .cy(cy), .screen_start_x(screen_start_x), .screen_start_y(screen_start_y));
 
 logic [1:0] mode = 2'd0;
 logic [1:0] resolution = 2'd3; // 640x480 @ 30FPS
@@ -140,7 +136,7 @@ logic ready;
 logic model_err;
 logic nack_err;
 
-ov5647 #(.TARGET_SCL_RATE(100000)) ov5647 (
+ov5647 #(.INPUT_CLK_RATE(48_000_000), .TARGET_SCL_RATE(100_000)) ov5647 (
     .clk_in(CLK_48MHZ),
     .scl(MIPI_SCL),
     .sda(MIPI_SDA),
@@ -153,12 +149,11 @@ ov5647 #(.TARGET_SCL_RATE(100000)) ov5647 (
     .nack_err(nack_err)
 );
 
-logic [7:0] image_data [0:3];
+logic [7:0] image_data [0:3] = '{8'hff, 8'hff, 8'hff, 8'hff};
 logic [5:0] image_data_type;
-logic image_data_enable;
+logic image_data_enable = 1'b1;
 logic [15:0] word_count;
 logic frame_start, frame_end;
-logic [1:0] enable;
 camera #(.NUM_LANES(2)) camera (
     .clock_p(MIPI_CLK),
     .data_p(MIPI_D),
@@ -208,8 +203,7 @@ arbiter arbiter (
 
 always @(posedge clk_pixel)
 begin
-    if (pixel_enable)
-        rgb <= {pixel, pixel, pixel};
+    rgb <= {pixel, pixel, pixel};
 end
 
 // logic [7:0] codepoints [0:3];
diff --git a/top/mkrvidor4000/pinout.tcl b/top/mkrvidor4000/pinout.tcl
@@ -14,8 +14,14 @@ set_global_assignment -name OPTIMIZATION_MODE "AGGRESSIVE PERFORMANCE"
 set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED
 set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
 set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA ON
+# set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ON
+# set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
+set_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
+# set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM
 
 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
 set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V

Original file line number	Diff line number	Diff line change
`@@ -1,6 +1,5 @@`
`1`	`1`	`files = [`
`2`	`2`	`"mkrvidor4000_top.sv",`
`3`		`- "MIPI_RX_ST.v",`
`4`	`3`	`"arbiter.sv"`
`5`	`4`	`]`
`6`	`5`
`@@ -11,7 +10,7 @@`
`11`	`10`	`"git@github.com:hdl-util/vga-text-mode.git::master",`
`12`	`11`	`"git@github.com:hdl-util/mipi-ccs.git::master",`
`13`	`12`	`"git@github.com:hdl-util/mipi-csi-2.git::master",`
`14`		`- "git@github.com:hdl-util/as4c4m16sa.git::master",`
	`13`	`+ "git@github.com:hdl-util/sdram-controller.git::master",`
`15`	`14`	`]`
`16`	`15`	`}`
`17`	`16`