From 0bcf437e8b8e49d017f0faf2ddd44fe90e1c812d Mon Sep 17 00:00:00 2001 From: Asherah Connor Date: Sat, 18 May 2024 16:19:53 +0300 Subject: [PATCH] test: failing wider elements test. --- .../cxxrtl/BlackBoxGeneratorSpec.scala | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/src/test/scala/ee/hrzn/chryse/platform/cxxrtl/BlackBoxGeneratorSpec.scala b/src/test/scala/ee/hrzn/chryse/platform/cxxrtl/BlackBoxGeneratorSpec.scala index 90e81b4..776a58a 100644 --- a/src/test/scala/ee/hrzn/chryse/platform/cxxrtl/BlackBoxGeneratorSpec.scala +++ b/src/test/scala/ee/hrzn/chryse/platform/cxxrtl/BlackBoxGeneratorSpec.scala @@ -41,6 +41,20 @@ class BlackBoxGeneratorSpec extends AnyFlatSpec with Matchers { | attribute \cxxrtl_sync 1 | wire output 5 \d_out_1 |end +""".stripMargin) + } + + it should "expand wider elements correctly" in { + val sw = new StringWriter + BlackBoxGenerator(sw, classOf[WiderElementsBB]) + sw.toString() should be("""attribute \cxxrtl_blackbox 1 + |attribute \blackbox 1 + |module \WiderElementsBB + | wire input 1 width 64 \d_in + | + | attribute \cxxrtl_sync 1 + | wire output 2 width 8 \d_out + |end """.stripMargin) } } @@ -60,3 +74,10 @@ private class VecOfBoolBB extends BlackBox { val d_out = Output(Vec(2, Bool())) }) } + +private class WiderElementsBB extends BlackBox { + val io = IO(new Bundle { + val d_in = Input(UInt(64.W)) + val d_out = Input(SInt(8.W)) + }) +}