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Backport 27468 ([rescue,opentitanlib,test] Add functional test for GetOwnerPage) #18991

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Backport 27468 ([rescue,opentitanlib,test] Add functional test for GetOwnerPage)

Backport 27468 ([rescue,opentitanlib,test] Add functional test for GetOwnerPage) #18991

Triggered via pull request February 18, 2026 11:59
@pamaurypamaury
synchronize #29320
pamaury:backport_27468
Status Failure
Total duration 2h 56m 15s
Artifacts 30

ci.yml

on: pull_request
Lint (quick)
2m 41s
Lint (quick)
Earl Grey for CW340  /  Build bitstream
1m 24s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1m 22s
Earl Grey for CW310 Hyperdebug / Build bitstream
Lint (slow)
13m 55s
Lint (slow)
Build documentation
4m 32s
Build documentation
Airgapped build
19m 22s
Airgapped build
Verible lint
1m 10s
Verible lint
Run OTBN smoke Test
2m 47s
Run OTBN smoke Test
Run OTBN crypto tests
20m 9s
Run OTBN crypto tests
Verilated English Breakfast
5m 41s
Verilated English Breakfast
Verilated Earl Grey
1h 31m
Verilated Earl Grey
CW305's Bitstream
27m 42s
CW305's Bitstream
Build Docker Containers
3m 16s
Build Docker Containers
Build and test software
23m 25s
Build and test software
Build and test Darjeeling software
15m 3s
Build and test Darjeeling software
QEMU smoketest
2m 45s
QEMU smoketest
Test QEMU local development override
4m 36s
Test QEMU local development override
CW340 Test ROM Tests  /  FPGA test
4m 5s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
10m 55s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
1h 3m
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
24m 51s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
58m 32s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
41m 25s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
9s
Cache bitstreams to GCP
CW310 Test ROM Tests  /  FPGA test
3m 28s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
32m 18s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
3m 35s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
14m 1s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
4m 29s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
9m 0s
CW310 Manufacturing Tests / FPGA test
Merge blocker
3s
Merge blocker
Verify FPGA jobs
26s
Verify FPGA jobs
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Annotations

18 errors and 1 warning
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
bash.sw/device/tests/usbdev_mixed_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 142
bash.sw/device/tests/usbdev_sleep_reset_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 142
bash.sw/device/tests/usbdev_deep_disconnect_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 142
bash.sw/device/tests/usbdev_iso_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 142
bash.sw/device/tests/usbdev_setuprx_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 1
bash.sw/device/tests/usbdev_stream_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 142
bash.sw/device/tests/usbdev_deep_resume_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 142
bash.sw/device/tests/usbdev_suspend_resume_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 142
bash.sw/device/tests/usbdev_pincfg_test_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 1
bash.sw/device/silicon_creator/lib/drivers/usb_functest_fpga_cw340_sival_rom_ext.bash: bash#L1
exited with error code 142
CW340 SiVal ROM_EXT Tests / FPGA test
Process completed with exit code 3.
bash.sw/device/silicon_creator/rom_ext/e2e/rescue/rescue_disability_xmodem_fpga_cw340_rom_ext.bash: bash#L1
exited with error code 1
bash.sw/device/silicon_creator/rom_ext/e2e/rescue/rescue_disability_spidfu_fpga_cw340_rom_ext.bash: bash#L1
exited with error code 1
CW340 ROM_EXT Tests / FPGA test
Process completed with exit code 3.
Verilated English Breakfast
No files were found with the provided path: build-bin/hw/top_englishbreakfast/Vchip_englishbreakfast_verilator. No artifacts will be uploaded.

Artifacts

Produced during runtime
Name Size Digest
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docs
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execute_sival_fpga_tests_cw340-test-results
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execute_sival_rom_ext_fpga_tests_cw310-targets
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execute_sival_rom_ext_fpga_tests_cw310-test-results
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execute_sival_rom_ext_fpga_tests_cw340-targets
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execute_sival_rom_ext_fpga_tests_cw340-test-results
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execute_test_rom_fpga_tests_cw340-test-results
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partial-build-bin-chip_earlgrey_cw310_hyperdebug
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verilator_earlgrey-test-results
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