@@ -1173,13 +1173,16 @@ static int ot_i2c_target_event(I2CSlave *target, enum i2c_event event)
11731173 }
11741174
11751175 switch (event ) {
1176+ case I2C_START_SEND :
11761177 case I2C_START_SEND_ASYNC :
11771178 /* Set the first byte to the matched target address + RW bit as 0. */
11781179 ot_i2c_target_set_acqdata (s ,
11791180 ot_i2c_address_abyte (s -> matched_address ,
11801181 false),
11811182 SIGNAL_START );
1182- i2c_ack (s -> bus );
1183+ if (event == I2C_START_SEND_ASYNC ) {
1184+ i2c_ack (s -> bus );
1185+ }
11831186 break ;
11841187 case I2C_START_RECV :
11851188 ot_i2c_target_set_acqdata (s ,
@@ -1242,6 +1245,18 @@ static uint8_t ot_i2c_target_recv(I2CSlave *target)
12421245 return data ;
12431246}
12441247
1248+ static int ot_i2c_target_send (I2CSlave * target , uint8_t data )
1249+ {
1250+ BusState * abus = qdev_get_parent_bus (DEVICE (target ));
1251+ OtI2CState * s = OT_I2C (abus -> parent );
1252+ if (!ot_i2c_target_enabled (s )) {
1253+ return -1 ;
1254+ }
1255+
1256+ ot_i2c_target_set_acqdata (s , data , SIGNAL_NONE );
1257+ return 0 ;
1258+ }
1259+
12451260static void ot_i2c_target_send_async (I2CSlave * target , uint8_t data )
12461261{
12471262 BusState * abus = qdev_get_parent_bus (DEVICE (target ));
@@ -1289,6 +1304,7 @@ static void ot_i2c_target_class_init(ObjectClass *klass, void *data)
12891304 dc -> desc = "OpenTitan I2C Target" ;
12901305 sc -> match_and_add = & ot_i2c_target_match_and_add ;
12911306 sc -> event = & ot_i2c_target_event ;
1307+ sc -> send = & ot_i2c_target_send ;
12921308 sc -> send_async = & ot_i2c_target_send_async ;
12931309 sc -> recv = & ot_i2c_target_recv ;
12941310}
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