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| 1 | +/* |
| 2 | + * FreeRTOS Kernel V10.0.0 |
| 3 | + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. |
| 4 | + * |
| 5 | + * Permission is hereby granted, free of charge, to any person obtaining a copy of |
| 6 | + * this software and associated documentation files (the "Software"), to deal in |
| 7 | + * the Software without restriction, including without limitation the rights to |
| 8 | + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of |
| 9 | + * the Software, and to permit persons to whom the Software is furnished to do so, |
| 10 | + * subject to the following conditions: |
| 11 | + * |
| 12 | + * The above copyright notice and this permission notice shall be included in all |
| 13 | + * copies or substantial portions of the Software. If you wish to use our Amazon |
| 14 | + * FreeRTOS name, please do so in a fair use way that does not cause confusion. |
| 15 | + * |
| 16 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS |
| 18 | + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR |
| 19 | + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER |
| 20 | + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 21 | + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | + * |
| 23 | + * http://www.FreeRTOS.org |
| 24 | + * http://aws.amazon.com/freertos |
| 25 | + * |
| 26 | + * 1 tab == 4 spaces! |
| 27 | + */ |
| 28 | + |
| 29 | +/*----------------------------------------------------------- |
| 30 | + * Implementation of functions defined in portable.h for the ARM CM4F port. |
| 31 | + *----------------------------------------------------------*/ |
| 32 | + |
| 33 | +/* Scheduler includes. */ |
| 34 | +#include "FreeRTOS.h" |
| 35 | +#include "task.h" |
| 36 | + |
| 37 | +/* |
| 38 | + * Start first task is a separate function so it can be tested in isolation. |
| 39 | + */ |
| 40 | +void vPortStartFirstTask( void ) __attribute__ (( naked )); |
| 41 | + |
| 42 | +/* |
| 43 | + * Exception handlers. |
| 44 | + */ |
| 45 | +void vPortSVCHandler( void ) __attribute__ (( naked )); |
| 46 | +void xPortPendSVHandler( void ) __attribute__ (( naked )); |
| 47 | + |
| 48 | + |
| 49 | +/*-----------------------------------------------------------*/ |
| 50 | + |
| 51 | +void vPortStartFirstTask( void ) |
| 52 | +{ |
| 53 | + __asm volatile( |
| 54 | +#if defined(__SES_ARM) |
| 55 | + " ldr r0, =_vectors \n" /* Locate the stack using _vectors table. */ |
| 56 | +#else |
| 57 | + " ldr r0, =__isr_vector \n" /* Locate the stack using __isr_vector table. */ |
| 58 | +#endif |
| 59 | + " ldr r0, [r0] \n" |
| 60 | + " msr msp, r0 \n" /* Set the msp back to the start of the stack. */ |
| 61 | + " cpsie i \n" /* Globally enable interrupts. */ |
| 62 | + " cpsie f \n" |
| 63 | + " dsb \n" |
| 64 | + " isb \n" |
| 65 | +#ifdef SOFTDEVICE_PRESENT |
| 66 | + /* Block kernel interrupts only (PendSV) before calling SVC */ |
| 67 | + " mov r0, %0 \n" |
| 68 | + " msr basepri, r0 \n" |
| 69 | +#endif |
| 70 | + " svc 0 \n" /* System call to start first task. */ |
| 71 | + " \n" |
| 72 | + " .align 2 \n" |
| 73 | +#ifdef SOFTDEVICE_PRESENT |
| 74 | + ::"i"(configKERNEL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) |
| 75 | +#endif |
| 76 | + ); |
| 77 | +} |
| 78 | + |
| 79 | +/*-----------------------------------------------------------*/ |
| 80 | + |
| 81 | +void vPortSVCHandler( void ) |
| 82 | +{ |
| 83 | + __asm volatile ( |
| 84 | + " ldr r3, =pxCurrentTCB \n" /* Restore the context. */ |
| 85 | + " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */ |
| 86 | + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */ |
| 87 | + " ldmia r0!, {r4-r11, r14} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */ |
| 88 | + " msr psp, r0 \n" /* Restore the task stack pointer. */ |
| 89 | + " isb \n" |
| 90 | + " mov r0, #0 \n" |
| 91 | + " msr basepri, r0 \n" |
| 92 | + " bx r14 \n" |
| 93 | + " \n" |
| 94 | + " .align 2 \n" |
| 95 | + ); |
| 96 | +} |
| 97 | + |
| 98 | +/*-----------------------------------------------------------*/ |
| 99 | + |
| 100 | +void xPortPendSVHandler( void ) |
| 101 | +{ |
| 102 | + /* This is a naked function. */ |
| 103 | + |
| 104 | + __asm volatile |
| 105 | + ( |
| 106 | + " mrs r0, psp \n" |
| 107 | + " isb \n" |
| 108 | + " \n" |
| 109 | + " ldr r3, =pxCurrentTCB \n" /* Get the location of the current TCB. */ |
| 110 | + " ldr r2, [r3] \n" |
| 111 | + " \n" |
| 112 | + " tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */ |
| 113 | + " it eq \n" |
| 114 | + " vstmdbeq r0!, {s16-s31} \n" |
| 115 | + " \n" |
| 116 | + " stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */ |
| 117 | + " \n" |
| 118 | + " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */ |
| 119 | + " \n" |
| 120 | + " stmdb sp!, {r3} \n" |
| 121 | + " mov r0, %0 \n" |
| 122 | + " msr basepri, r0 \n" |
| 123 | + " dsb \n" |
| 124 | + " isb \n" |
| 125 | + " bl vTaskSwitchContext \n" |
| 126 | + " mov r0, #0 \n" |
| 127 | + " msr basepri, r0 \n" |
| 128 | + " ldmia sp!, {r3} \n" |
| 129 | + " \n" |
| 130 | + " ldr r1, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */ |
| 131 | + " ldr r0, [r1] \n" |
| 132 | + " \n" |
| 133 | + " ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */ |
| 134 | + " \n" |
| 135 | + " tst r14, #0x10 \n" /* Is the task using the FPU context? If so, pop the high vfp registers too. */ |
| 136 | + " it eq \n" |
| 137 | + " vldmiaeq r0!, {s16-s31} \n" |
| 138 | + " \n" |
| 139 | + " msr psp, r0 \n" |
| 140 | + " isb \n" |
| 141 | + " \n" |
| 142 | + " \n" |
| 143 | + " bx r14 \n" |
| 144 | + " \n" |
| 145 | + " .align 2 \n" |
| 146 | + ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) |
| 147 | + ); |
| 148 | +} |
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