@@ -762,6 +762,26 @@ typedef struct {
762762 UINT32 Sv : 1 ; /* Save */
763763} NVME_ADMIN_SET_FEATURES ;
764764
765+ typedef union {
766+ NVME_ADMIN_SET_FEATURES Bits ;
767+ UINT32 Uint32 ;
768+ } NVME_ADMIN_SET_FEATURES_CDW10 ;
769+
770+ //
771+ // NvmExpress Admin Set Features Command - Number of Queues Feature
772+ //
773+ typedef union {
774+ //
775+ // CDW 11 for Requested, DW0 for Allocated
776+ //
777+ struct {
778+ UINT32 NSQ : 16 ; /* Number of Submission Queues */
779+ UINT32 NCQ : 16 ; /* Number of Completion Queues */
780+ } Bits ;
781+
782+ UINT32 Uint32 ;
783+ } NVME_ADMIN_SET_FEATURES_NUM_QUEUES ;
784+
765785//
766786// NvmExpress Admin Sanitize Command
767787//
@@ -984,6 +1004,28 @@ typedef enum {
9841004 SanitizeOpcode = NVME_ADMIN_SANITIZE_CMD
9851005} NVME_ADMIN_COMMAND_OPCODE ;
9861006
1007+ //
1008+ // Nvm Express Admin Feature Identifiers
1009+ // Nvm Express Spec v1.3d Figure 129
1010+ //
1011+ #define NVME_FEATURE_ARBITRATION 0x01
1012+ #define NVME_FEATURE_POWER_MANAGEMENT 0x02
1013+ #define NVME_FEATURE_LBA_RANGE_TYPE 0x03
1014+ #define NVME_FEATURE_TEMPERATURE_THRESHOLD 0x04
1015+ #define NVME_FEATURE_ERROR_RECOVERY 0x05
1016+ #define NVME_FEATURE_VOLATILE_WRITE_CACHE 0x06
1017+ #define NVME_FEATURE_NUMBER_OF_QUEUES 0x07
1018+ #define NVME_FEATURE_INTERRUPT_COALESCING 0x08
1019+ #define NVME_FEATURE_INTERRUPT_VECTOR_CONF 0x09
1020+ #define NVME_FEATURE_WRITE_ATOMICITY 0x0A
1021+ #define NVME_FEATURE_ASYNC_EVENT_CONFIG 0x0B
1022+ #define NVME_FEATURE_AUTONOMOUS_POWER_STATE_TRANSITION 0x0C
1023+ #define NVME_FEATURE_HOST_MEMORY_BUFFER 0x0D
1024+ #define NVME_FEATURE_TIMESTAMP 0x0E
1025+ #define NVME_FEATURE_KEEP_ALIVE_TIMER 0x0F
1026+ #define NVME_FEATURE_HOST_CONTROLLED_THERMAL_MANAGEMENT 0x10
1027+ #define NVME_FEATURE_NON_OPERATIONAL_POWER_STATE_CONFIG 0x11
1028+
9871029//
9881030// Controller or Namespace Structure (CNS) field
9891031// (ref. spec. v1.1 figure 82).
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