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author
Jenna Goddard
committed
TDX only
1 parent 240afba commit 896cddf

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7 files changed

+19
-147
lines changed

7 files changed

+19
-147
lines changed

openhcl/virt_mshv_vtl/src/lib.rs

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1945,10 +1945,17 @@ impl UhPartition {
19451945
}
19461946

19471947
/// Trigger the LINT1 interrupt vector on the LAPIC of the BSP.
1948-
#[cfg(guest_arch = "x86_64")]
19491948
pub fn assert_debug_interrupt(&self, vtl: u8) {
1950-
let bsp_index = VpIndex::new(0);
1951-
self.pulse_lint(bsp_index, Vtl::try_from(vtl).unwrap(), 1)
1949+
#[cfg(guest_arch = "x86_64")]
1950+
match self.inner.isolation {
1951+
IsolationType::Snp => {
1952+
tracing::error!(?vtl, "Debug interrupts cannot be injected into SNP VMs",);
1953+
}
1954+
_ => {
1955+
let bsp_index = VpIndex::new(0);
1956+
self.pulse_lint(bsp_index, Vtl::try_from(vtl).unwrap(), 1)
1957+
}
1958+
}
19521959
}
19531960

19541961
/// Enables or disables the PM timer assist.

openhcl/virt_mshv_vtl/src/processor/hardware_cvm/apic.rs

Lines changed: 1 addition & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,6 @@
55

66
use crate::UhProcessor;
77
use crate::processor::HardwareIsolatedBacking;
8-
use crate::processor::NMI_SUPPRESS_LINT1_REQUESTED;
98
use cvm_tracing::CVM_ALLOWED;
109
use hcl::GuestVtl;
1110
use virt::Processor;
@@ -29,8 +28,6 @@ pub(crate) trait ApicBacking<'b, B: HardwareIsolatedBacking> {
2928
fn handle_extint(&mut self, vtl: GuestVtl) {
3029
tracelimit::warn_ratelimited!(CVM_ALLOWED, ?vtl, "extint not supported");
3130
}
32-
33-
fn supports_nmi_masking(&mut self) -> bool;
3431
}
3532

3633
pub(crate) fn poll_apic_core<'b, B: HardwareIsolatedBacking, T: ApicBacking<'b, B>>(
@@ -56,7 +53,6 @@ pub(crate) fn poll_apic_core<'b, B: HardwareIsolatedBacking, T: ApicBacking<'b,
5653
extint,
5754
sipi,
5855
nmi,
59-
lint1,
6056
interrupt,
6157
} = vp.backing.cvm_state_mut().lapics[vtl]
6258
.lapic
@@ -97,21 +93,10 @@ pub(crate) fn poll_apic_core<'b, B: HardwareIsolatedBacking, T: ApicBacking<'b,
9793
}
9894

9995
// Interrupts are ignored while waiting for SIPI.
100-
let supports_nmi_masking = apic_backing.supports_nmi_masking();
10196
let lapic = &mut apic_backing.vp().backing.cvm_state_mut().lapics[vtl];
10297
if lapic.activity != MpState::WaitForSipi {
103-
if lint1 {
104-
if supports_nmi_masking || !lapic.cross_vtl_nmi_requested {
105-
lapic.nmi_suppression |= NMI_SUPPRESS_LINT1_REQUESTED;
106-
lapic.nmi_pending = true;
107-
}
108-
}
109-
110-
if nmi {
98+
if nmi || lapic.nmi_pending {
11199
lapic.nmi_pending = true;
112-
}
113-
114-
if lapic.nmi_pending {
115100
apic_backing.handle_nmi(vtl);
116101
}
117102

openhcl/virt_mshv_vtl/src/processor/hardware_cvm/mod.rs

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2766,17 +2766,6 @@ impl<T, B: HardwareIsolatedBacking> hv1_hypercall::AssertVirtualInterrupt
27662766
return Err(HvError::InvalidParameter);
27672767
}
27682768

2769-
if matches!(
2770-
interrupt_control.interrupt_type(),
2771-
HvInterruptType::HvX64InterruptTypeNmi
2772-
) {
2773-
// Note whether this is a cross-VTL NMI request. If so, this must be
2774-
// visible before any NMIs are requested.
2775-
if self.intercepted_vtl == GuestVtl::Vtl1 && target_vtl == GuestVtl::Vtl0 {
2776-
self.vp.backing.cvm_state_mut().lapics[target_vtl].cross_vtl_nmi_requested = true;
2777-
}
2778-
}
2779-
27802769
self.vp.partition.request_msi(
27812770
target_vtl,
27822771
MsiRequest::new_x86(

openhcl/virt_mshv_vtl/src/processor/mod.rs

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -154,21 +154,12 @@ impl VtlsTlbLocked {
154154
}
155155
}
156156

157-
// NMI suppression state to prevent duplicate NMI
158-
#[cfg(guest_arch = "x86_64")]
159-
const NMI_SUPPRESS_LINT1_DELIVERED: u32 = 1;
160-
#[cfg(guest_arch = "x86_64")]
161-
const NMI_SUPPRESS_LINT1_REQUESTED: u32 = 1 << 1;
162-
163157
#[cfg(guest_arch = "x86_64")]
164158
#[derive(Inspect)]
165159
pub(crate) struct LapicState {
166160
lapic: LocalApic,
167161
activity: MpState,
168162
nmi_pending: bool,
169-
lint1_pending: bool,
170-
nmi_suppression: u32,
171-
cross_vtl_nmi_requested: bool,
172163
}
173164

174165
#[cfg(guest_arch = "x86_64")]
@@ -178,9 +169,6 @@ impl LapicState {
178169
lapic,
179170
activity,
180171
nmi_pending: false,
181-
lint1_pending: false,
182-
nmi_suppression: 0,
183-
cross_vtl_nmi_requested: false,
184172
}
185173
}
186174
}

openhcl/virt_mshv_vtl/src/processor/snp/mod.rs

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,6 @@ use crate::UhCvmVpState;
2222
use crate::UhPartitionInner;
2323
use crate::UhPartitionNewParams;
2424
use crate::WakeReason;
25-
use crate::processor::NMI_SUPPRESS_LINT1_DELIVERED;
26-
use crate::processor::NMI_SUPPRESS_LINT1_REQUESTED;
2725
use crate::processor::UhHypercallHandler;
2826
use crate::processor::UhProcessor;
2927
use crate::processor::hardware_cvm::apic::ApicBacking;
@@ -886,20 +884,6 @@ impl<'b> ApicBacking<'b, SnpBacked> for UhProcessor<'b, SnpBacked> {
886884
// TODO SNP: support virtual NMI injection
887885
// For now, just inject an NMI and hope for the best.
888886
// Don't forget to update handle_cross_vtl_interrupts if this code changes.
889-
890-
if (self.backing.cvm.lapics[vtl].nmi_suppression & NMI_SUPPRESS_LINT1_DELIVERED) != 0 {
891-
// Cancel this NMI request since it cannot be delivered.
892-
self.backing.cvm.lapics[vtl].nmi_pending = false;
893-
return;
894-
}
895-
896-
if (self.backing.cvm.lapics[vtl].nmi_suppression & NMI_SUPPRESS_LINT1_REQUESTED) != 0 {
897-
// If a LINT1 NMI has been requested, then it is being delivered now,
898-
// so no further NMIs can be delivered.
899-
self.backing.cvm.lapics[vtl].nmi_suppression &= !NMI_SUPPRESS_LINT1_REQUESTED;
900-
self.backing.cvm.lapics[vtl].nmi_suppression |= NMI_SUPPRESS_LINT1_DELIVERED;
901-
}
902-
903887
let mut vmsa = self.runner.vmsa_mut(vtl);
904888

905889
// TODO GUEST VSM: Don't inject the NMI if there's already an event
@@ -921,10 +905,6 @@ impl<'b> ApicBacking<'b, SnpBacked> for UhProcessor<'b, SnpBacked> {
921905
vmsa.set_rip(0);
922906
self.backing.cvm.lapics[vtl].activity = MpState::Running;
923907
}
924-
925-
fn supports_nmi_masking(&mut self) -> bool {
926-
false
927-
}
928908
}
929909

930910
impl UhProcessor<'_, SnpBacked> {

openhcl/virt_mshv_vtl/src/processor/tdx/mod.rs

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1459,10 +1459,6 @@ impl<'b> hardware_cvm::apic::ApicBacking<'b, TdxBacked> for TdxApicScanner<'_, '
14591459
self.vp.backing.vtls[vtl].private_regs.rip = 0;
14601460
self.vp.backing.cvm.lapics[vtl].activity = MpState::Running;
14611461
}
1462-
1463-
fn supports_nmi_masking(&mut self) -> bool {
1464-
true
1465-
}
14661462
}
14671463

14681464
impl UhProcessor<'_, TdxBacked> {

vmm_core/virt_support_apic/src/lib.rs

Lines changed: 8 additions & 81 deletions
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,6 @@ struct Stats {
123123
eoi_level: Counter,
124124
spurious_eoi: Counter,
125125
lazy_eoi: Counter,
126-
lint1: Counter,
127126
interrupt: Counter,
128127
nmi: Counter,
129128
extint: Counter,
@@ -231,8 +230,7 @@ struct WorkFlags {
231230
sipi_vector: u8,
232231
extint: bool,
233232
nmi: bool,
234-
lint1: bool,
235-
#[bits(19)]
233+
#[bits(20)]
236234
_rsvd: u32,
237235
}
238236

@@ -442,23 +440,13 @@ impl LocalApicSet {
442440
// Don't know how to manage remote IRR.
443441
return;
444442
}
445-
if lint_index == 1 {
446-
slot.request_lint1(
447-
DeliveryMode(lvt.delivery_mode()),
448-
lvt.vector(),
449-
lvt.trigger_mode_level(),
450-
false,
451-
wake,
452-
);
453-
} else {
454-
slot.request_interrupt(
455-
DeliveryMode(lvt.delivery_mode()),
456-
lvt.vector(),
457-
lvt.trigger_mode_level(),
458-
false,
459-
wake,
460-
);
461-
}
443+
slot.request_interrupt(
444+
DeliveryMode(lvt.delivery_mode()),
445+
lvt.vector(),
446+
lvt.trigger_mode_level(),
447+
false,
448+
wake,
449+
);
462450
}
463451
}
464452
}
@@ -1235,38 +1223,6 @@ impl SharedState {
12351223
_ => false,
12361224
}
12371225
}
1238-
1239-
/// Returns true if the VP should be woken up to scan the APIC.
1240-
#[must_use]
1241-
fn request_lint1(
1242-
&self,
1243-
software_enabled: bool,
1244-
delivery_mode: DeliveryMode,
1245-
vector: u8,
1246-
level_triggered: bool,
1247-
auto_eoi: bool,
1248-
) -> bool {
1249-
match delivery_mode {
1250-
DeliveryMode::NMI => {
1251-
let old = self
1252-
.work
1253-
.fetch_update(Ordering::Release, Ordering::Relaxed, |w| {
1254-
Some(WorkFlags::from(w).with_lint1(true).into())
1255-
})
1256-
.unwrap();
1257-
old == 0
1258-
}
1259-
_ => {
1260-
return self.request_interrupt(
1261-
software_enabled,
1262-
delivery_mode,
1263-
vector,
1264-
level_triggered,
1265-
auto_eoi,
1266-
);
1267-
}
1268-
}
1269-
}
12701226
}
12711227

12721228
impl MutableGlobalState {
@@ -1327,29 +1283,6 @@ impl ApicSlot {
13271283
}
13281284
}
13291285
}
1330-
1331-
fn request_lint1(
1332-
&self,
1333-
delivery_mode: DeliveryMode,
1334-
vector: u8,
1335-
level_triggered: bool,
1336-
auto_eoi: bool,
1337-
wake: impl FnOnce(VpIndex),
1338-
) {
1339-
if let Some(shared) = &self.shared {
1340-
if self.hardware_enabled
1341-
&& shared.request_lint1(
1342-
self.software_enabled,
1343-
delivery_mode,
1344-
vector,
1345-
level_triggered,
1346-
auto_eoi,
1347-
)
1348-
{
1349-
wake(shared.vp_index);
1350-
}
1351-
}
1352-
}
13531286
}
13541287

13551288
/// Work to do as a result of [`LocalApic::scan`] or [`LocalApic::flush`].
@@ -1372,8 +1305,6 @@ pub struct ApicWork {
13721305
pub extint: bool,
13731306
/// An NMI was requested.
13741307
pub nmi: bool,
1375-
/// LINT1 was requested.
1376-
pub lint1: bool,
13771308
/// A fixed interrupt was requested.
13781309
///
13791310
/// Call [`LocalApic::acknowledge_interrupt`] after it has been injected.
@@ -1643,10 +1574,6 @@ impl LocalApic {
16431574
self.stats.nmi.increment();
16441575
r.nmi = true;
16451576
}
1646-
if work.lint1() {
1647-
self.stats.lint1.increment();
1648-
r.lint1 = true;
1649-
}
16501577
if work.extint() {
16511578
self.stats.extint.increment();
16521579
r.extint = true;

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