Tracking issue: Feature completeness

[vbe0201]

This is a tracking issue for the features of this library.

The TRM

The Tegra X1 Technical Reference Manual (TRM), along with the tegra210 drivers in the Linux kernel are probably the most complete and detailed sources of documentation of Tegra X1 SoC functionality out there. (Beware: Both are bad, but one better than the other!)

The TRM can be obtained from NVIDIA's download center as Tegra X1 (SoC) Technical Reference Manual as soon as you've created an account for free. It documents most hardware capabilities, which is a good starting point for new drivers.

Implementation Guidelines

• Fundamentally, it is expected that registers are wrapped through register-rs and exposed.

  • Even if actual logic can't be implemented due to the lack of knowledge/documentation, users have the possibility to do that themselves.
  • An abstract driver implementation may not fit the needs of the user, giving them full control over what they are trying to achieve.

• On top of the registers, a reference implementation of a driver can be built.

  • It is expected that the core functionality of a device is exposed.
  • These implementations should provide a safe and easy-to-use API for interfacing with the hardware.
  • Code is expected to be well-documented so readers can understand the logic and purpose behind it.

Features

• 2. Address and Interrupt Map

• 3. Interrupt Controller

• 4. Semaphores

• 5. Clock and Reset Controller

• 6. CL-DVFS

• 7. Atomics

• 8. Timers

• 9. Multi-Purpose I/O Pins and Pin Multiplexing (Pinmux)

• 10. Activity Monitor

• 11. Real-Time Clock

• 12. Power Management Controller

• 13. Boot Process (WIP)

  • Fuses

• 14. Host Subsystem

• 15. Video Image Compositor (VIC)

• 16. CPU Complex

• 17. Flow Controller

• 18. Memory Controller

• 19. AHB

• 21. APB

• 22. USB Complex

• 23. Audio Processing Engine

• 24. Display Controller

• 25. Color Decompression Engine

• 26./27. Display Interfaces

• 28. HDMI CEC

• 29./30. MIPI-CSI

• 31. Video Input (VI)

• 32. SD/MMC Controller

• 33. SATA Controller

• 34. PCI Express Controller

• 35. I2C Controller

• 36. UART Controller

• 37. Serial Peripheral Interface (SPI) Controller (WIP)

• 38. Quad Serial Peripheral Interface (QSPI) Controller (WIP)

• 39. PWM Controller

• 41. Boot and Power Management Processor-Lite

• 42. CoreSight (Debugging)

Not mentioned on the TRM but also relevant:

• Tegra Security Co-Processor (TSEC)

• Security Engine (SE)

• NVHOST