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@Naseer-010 Naseer-010 commented Dec 7, 2025

Details:

  • Implements JIT emitter for SoftPlus activation function (softplus(x) = ln(1 + exp(x))) on RISC-V64 architecture with RVV 1.0 support.

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Implemented jit_softplus_emitter for SoftPlus operation with support for RISCV64 architecture. Added methods for input count, auxiliary register counts, and emission of SoftPlus logic.
Updated the softplus implementation for numerical stability and accuracy. Adjusted auxiliary vector counts and refined calculations for large and small input values.
Registering the EltwiseSoftplus in the kernel
Removed unnecessary verbose comments and formatted the code for easier understanding
@Naseer-010 Naseer-010 requested review from a team as code owners December 7, 2025 12:32
@github-actions github-actions bot added the category: CPU OpenVINO CPU plugin label Dec 7, 2025
@sys-openvino-ci sys-openvino-ci added the ExternalPR External contributor label Dec 7, 2025
@Naseer-010 Naseer-010 changed the title [CPU][RISCV64] Implement JIT emitter for SoftPlus activation #30244 [CPU][RISCV64] Implement CPU Plugin JIT emitter for SoftPlus activation Dec 7, 2025
@maxnick
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maxnick commented Dec 8, 2025

@aobolensk , could you please review?

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4 participants