add minibar-a and minibar-b boards (#2275)

These boards can both use the same FPGA image. Due to a hardware bug,
the SP could not talk to the management network switch on minibar-a, but
that was fixed on minibar-b so we can add the `net` task there.

Author: Aaron-Hartwig

app/minibar/app.toml renamed to app/minibar/base.toml

@@ -1,5 +1,3 @@
-name = "minibar"
-board = "minibar"
 target = "thumbv7em-none-eabihf"
 chip = "../../chips/stm32h7"
 stacksize = 896
@@ -346,6 +344,6 @@ memory-size = 33_554_432 # 256 Mib / 32 MiB
 slot-count = 16 # 2 MiB slots
 
 [[auxflash.blobs]]
-file = "drv/minibar-seq-api/minibar_controller_hcv_a.bit"
+file = "drv/minibar-seq-api/minibar_controller.bit"
 compress = true
 tag = "FPGA"

app/minibar/rev-a.toml

@@ -0,0 +1,3 @@
+name = "minibar-a"
+board = "minibar-a"
+inherit = "base.toml"

app/minibar/app-net.toml renamed to app/minibar/rev-b.toml

@@ -1,10 +1,6 @@
-# Minibar with network connectivity
-#
-# NOTE: this requires rework to correct for a board-level issue
-# (see https://github.com/oxidecomputer/hardware-minibar/issues/168)
-
-name = "minibar-net"
-inherit = "app.toml"
+name = "minibar-b"
+board = "minibar-b"
+inherit = "base.toml"
 
 [kernel]
 features = ["dump"]

app/minibar/src/main.rs

@@ -85,15 +85,18 @@ fn system_init() {
 
     // Build the full ID
     let rev = p.GPIOK.idr.read().bits();
-    let rev = [5, 6, 7]
+    // The pins are listed in descending order as that how they got wired up.
+    let rev = [7, 6, 5]
         .iter()
         .enumerate()
         .map(|(i, bit)| if (rev & (1 << bit)) != 0 { 1 << i } else { 0 })
         .fold(0, |acc, v| acc | v);
 
     cfg_if::cfg_if! {
-        if #[cfg(target_board = "minibar")] {
+        if #[cfg(target_board = "minibar-a")] {
             let expected_rev = 0b000;
+        } else if #[cfg(target_board = "minibar-b")] {
+            let expected_rev = 0b001;
         } else {
             compile_error!("not a recognized minibar board")
         }

boards/minibar.toml renamed to boards/minibar-a.toml

@@ -0,0 +1,2 @@
+[probe-rs]
+chip-name = "STM32H753ZITx"

boards/minibar-b.toml

@@ -151,7 +151,7 @@ fn main() -> ! {
             driver.configure_gpio();
 
             let devices = [ecp5::Ecp5::new(driver)];
-        } else if #[cfg(target_board = "minibar")] {
+        } else if #[cfg(any(target_board = "minibar-a", target_board = "minibar-b"))] {
             let configuration_port =
                 spi.device(drv_spi_api::devices::ECP5_FPGA);
             let user_design =

drv/fpga-server/src/main.rs

@@ -1,2 +1,2 @@
-`minibar_controller_hvc_a.bit` and `minibar_regs.json` are generated at
-[this commit](https://github.com/oxidecomputer/quartz/commit/ba03a69ad4aa1940fe60d631797e8da17589beac)
+`minibar_controller.bit` and `minibar_regs.json` are generated at
+[this commit](https://github.com/oxidecomputer/quartz/commit/1934809db062acea87eff618423865e3e8118fcc)

drv/minibar-seq-api/README.md

@@ -17,7 +17,7 @@ fn main() -> Result<(), Box<dyn std::error::Error + Send + Sync>> {
 
     // Check that a valid bitstream is available for this board.
     let board = build_util::env_var("HUBRIS_BOARD")?;
-    if board != "minibar" {
+    if board != "minibar-a" && board != "minibar-b" {
         panic!("unknown target board");
     }