FPGA remaps 0x01000000 to 0x04000000 for APOB

Author: nathanaelhuffman

drv/spartan7-loader/cosmo-seq/README.md

@@ -1,3 +1 @@
-FPGA images and collateral are generated from:
-[this sha](https://github.com/oxidecomputer/quartz/commit/4ffe21b8cda5b48b44369812421d22b89288f47d)
-[release](https://api.github.com/repos/oxidecomputer/quartz/releases/228074962)
+FPGA images and collateral are generated from some hw guy's local build

drv/spartan7-loader/cosmo-seq/cosmo_seq.bz2

@@ -320,6 +320,10 @@
                         {
                             "name": "sp_ipcc_bus",
                             "value": 10
+                        },
+                        {
+                            "name": "t6_sequencer",
+                            "value": 11
                         }
                     ]
                 },
@@ -377,6 +381,10 @@
                         {
                             "name": "sp_ipcc_bus",
                             "value": 10
+                        },
+                        {
+                            "name": "t6_sequencer",
+                            "value": 11
                         }
                     ]
                 },
@@ -434,6 +442,10 @@
                         {
                             "name": "sp_ipcc_bus",
                             "value": 10
+                        },
+                        {
+                            "name": "t6_sequencer",
+                            "value": 11
                         }
                     ]
                 },
@@ -491,6 +503,10 @@
                         {
                             "name": "sp_ipcc_bus",
                             "value": 10
+                        },
+                        {
+                            "name": "t6_sequencer",
+                            "value": 11
                         }
                     ]
                 }
@@ -524,6 +540,17 @@
                     "se_onread": null,
                     "se_onwrite": null,
                     "desc": "convenience bit for setting up x4 espi debug out. This uses 1v8 debug header pins 7..0. Hw clears"
+                },
+                {
+                    "type": "field",
+                    "inst_name": "t6_seq_en",
+                    "lsb": 2,
+                    "msb": 2,
+                    "reset": 0,
+                    "sw_access": "rw",
+                    "se_onread": null,
+                    "se_onwrite": null,
+                    "desc": "convenience bit for setting up T6 sequencing debug out. This uses 1v8 debug header pins 7..0. Hw clears"
                 }
             ]
         }