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/* automatically generated by rust-bindgen 0.70.1 */
#[repr(transparent)]
#[derive(Default)]
#[cfg_attr(
feature = "serde",
derive(zerocopy::IntoBytes, zerocopy::Immutable, zerocopy::FromBytes)
)]
pub struct __IncompleteArrayField<T>(::std::marker::PhantomData<T>, [T; 0]);
impl<T> __IncompleteArrayField<T> {
#[inline]
pub const fn new() -> Self {
__IncompleteArrayField(::std::marker::PhantomData, [])
}
#[inline]
pub fn as_ptr(&self) -> *const T {
self as *const _ as *const T
}
#[inline]
pub fn as_mut_ptr(&mut self) -> *mut T {
self as *mut _ as *mut T
}
#[inline]
pub unsafe fn as_slice(&self, len: usize) -> &[T] {
unsafe { ::std::slice::from_raw_parts(self.as_ptr(), len) }
}
#[inline]
pub unsafe fn as_mut_slice(&mut self, len: usize) -> &mut [T] {
unsafe { ::std::slice::from_raw_parts_mut(self.as_mut_ptr(), len) }
}
}
impl<T> ::std::fmt::Debug for __IncompleteArrayField<T> {
fn fmt(&self, fmt: &mut ::std::fmt::Formatter<'_>) -> ::std::fmt::Result {
fmt.write_str("__IncompleteArrayField")
}
}
pub const __BITS_PER_LONG_LONG: u32 = 64;
pub const __FD_SETSIZE: u32 = 1024;
pub const _IOC_NRBITS: u32 = 8;
pub const _IOC_TYPEBITS: u32 = 8;
pub const _IOC_SIZEBITS: u32 = 14;
pub const _IOC_DIRBITS: u32 = 2;
pub const _IOC_NRMASK: u32 = 255;
pub const _IOC_TYPEMASK: u32 = 255;
pub const _IOC_SIZEMASK: u32 = 16383;
pub const _IOC_DIRMASK: u32 = 3;
pub const _IOC_NRSHIFT: u32 = 0;
pub const _IOC_TYPESHIFT: u32 = 8;
pub const _IOC_SIZESHIFT: u32 = 16;
pub const _IOC_DIRSHIFT: u32 = 30;
pub const _IOC_NONE: u32 = 0;
pub const _IOC_WRITE: u32 = 1;
pub const _IOC_READ: u32 = 2;
pub const IOC_IN: u32 = 1073741824;
pub const IOC_OUT: u32 = 2147483648;
pub const IOC_INOUT: u32 = 3221225472;
pub const IOCSIZE_MASK: u32 = 1073676288;
pub const IOCSIZE_SHIFT: u32 = 16;
pub const PTRACE_GETFDPIC: u32 = 33;
pub const PTRACE_GETFDPIC_EXEC: u32 = 0;
pub const PTRACE_GETFDPIC_INTERP: u32 = 1;
pub const RISCV_MAX_VLENB: u32 = 8192;
pub const KVM_COALESCED_MMIO_PAGE_OFFSET: u32 = 1;
pub const KVM_INTERRUPT_SET: i32 = -1;
pub const KVM_INTERRUPT_UNSET: i32 = -2;
pub const KVM_RISCV_MODE_S: u32 = 1;
pub const KVM_RISCV_MODE_U: u32 = 0;
pub const KVM_RISCV_TIMER_STATE_OFF: u32 = 0;
pub const KVM_RISCV_TIMER_STATE_ON: u32 = 1;
pub const KVM_REG_RISCV_TYPE_MASK: u32 = 4278190080;
pub const KVM_REG_RISCV_TYPE_SHIFT: u32 = 24;
pub const KVM_REG_RISCV_SUBTYPE_MASK: u32 = 16711680;
pub const KVM_REG_RISCV_SUBTYPE_SHIFT: u32 = 16;
pub const KVM_REG_RISCV_CONFIG: u32 = 16777216;
pub const KVM_REG_RISCV_CORE: u32 = 33554432;
pub const KVM_REG_RISCV_CSR: u32 = 50331648;
pub const KVM_REG_RISCV_CSR_GENERAL: u32 = 0;
pub const KVM_REG_RISCV_CSR_AIA: u32 = 65536;
pub const KVM_REG_RISCV_CSR_SMSTATEEN: u32 = 131072;
pub const KVM_REG_RISCV_TIMER: u32 = 67108864;
pub const KVM_REG_RISCV_FP_F: u32 = 83886080;
pub const KVM_REG_RISCV_FP_D: u32 = 100663296;
pub const KVM_REG_RISCV_ISA_EXT: u32 = 117440512;
pub const KVM_REG_RISCV_ISA_SINGLE: u32 = 0;
pub const KVM_REG_RISCV_ISA_MULTI_EN: u32 = 65536;
pub const KVM_REG_RISCV_ISA_MULTI_DIS: u32 = 131072;
pub const KVM_REG_RISCV_SBI_EXT: u32 = 134217728;
pub const KVM_REG_RISCV_SBI_SINGLE: u32 = 0;
pub const KVM_REG_RISCV_SBI_MULTI_EN: u32 = 65536;
pub const KVM_REG_RISCV_SBI_MULTI_DIS: u32 = 131072;
pub const KVM_REG_RISCV_VECTOR: u32 = 150994944;
pub const KVM_REG_RISCV_SBI_STATE: u32 = 167772160;
pub const KVM_REG_RISCV_SBI_STA: u32 = 0;
pub const KVM_DEV_RISCV_APLIC_ALIGN: u32 = 4096;
pub const KVM_DEV_RISCV_APLIC_SIZE: u32 = 16384;
pub const KVM_DEV_RISCV_APLIC_MAX_HARTS: u32 = 16384;
pub const KVM_DEV_RISCV_IMSIC_ALIGN: u32 = 4096;
pub const KVM_DEV_RISCV_IMSIC_SIZE: u32 = 4096;
pub const KVM_DEV_RISCV_AIA_GRP_CONFIG: u32 = 0;
pub const KVM_DEV_RISCV_AIA_CONFIG_MODE: u32 = 0;
pub const KVM_DEV_RISCV_AIA_CONFIG_IDS: u32 = 1;
pub const KVM_DEV_RISCV_AIA_CONFIG_SRCS: u32 = 2;
pub const KVM_DEV_RISCV_AIA_CONFIG_GROUP_BITS: u32 = 3;
pub const KVM_DEV_RISCV_AIA_CONFIG_GROUP_SHIFT: u32 = 4;
pub const KVM_DEV_RISCV_AIA_CONFIG_HART_BITS: u32 = 5;
pub const KVM_DEV_RISCV_AIA_CONFIG_GUEST_BITS: u32 = 6;
pub const KVM_DEV_RISCV_AIA_MODE_EMUL: u32 = 0;
pub const KVM_DEV_RISCV_AIA_MODE_HWACCEL: u32 = 1;
pub const KVM_DEV_RISCV_AIA_MODE_AUTO: u32 = 2;
pub const KVM_DEV_RISCV_AIA_IDS_MIN: u32 = 63;
pub const KVM_DEV_RISCV_AIA_IDS_MAX: u32 = 2048;
pub const KVM_DEV_RISCV_AIA_SRCS_MAX: u32 = 1024;
pub const KVM_DEV_RISCV_AIA_GROUP_BITS_MAX: u32 = 8;
pub const KVM_DEV_RISCV_AIA_GROUP_SHIFT_MIN: u32 = 24;
pub const KVM_DEV_RISCV_AIA_GROUP_SHIFT_MAX: u32 = 56;
pub const KVM_DEV_RISCV_AIA_HART_BITS_MAX: u32 = 16;
pub const KVM_DEV_RISCV_AIA_GUEST_BITS_MAX: u32 = 8;
pub const KVM_DEV_RISCV_AIA_GRP_ADDR: u32 = 1;
pub const KVM_DEV_RISCV_AIA_ADDR_APLIC: u32 = 0;
pub const KVM_DEV_RISCV_AIA_ADDR_MAX: u32 = 16385;
pub const KVM_DEV_RISCV_AIA_GRP_CTRL: u32 = 2;
pub const KVM_DEV_RISCV_AIA_CTRL_INIT: u32 = 0;
pub const KVM_DEV_RISCV_AIA_GRP_APLIC: u32 = 3;
pub const KVM_DEV_RISCV_AIA_GRP_IMSIC: u32 = 4;
pub const KVM_DEV_RISCV_AIA_IMSIC_ISEL_BITS: u32 = 12;
pub const KVM_DEV_RISCV_AIA_IMSIC_ISEL_MASK: u32 = 4095;
pub const KVM_NR_IRQCHIPS: u32 = 1;
pub const KVM_API_VERSION: u32 = 12;
pub const KVM_MEM_LOG_DIRTY_PAGES: u32 = 1;
pub const KVM_MEM_READONLY: u32 = 2;
pub const KVM_MEM_GUEST_MEMFD: u32 = 4;
pub const KVM_PIT_SPEAKER_DUMMY: u32 = 1;
pub const KVM_EXIT_HYPERV_SYNIC: u32 = 1;
pub const KVM_EXIT_HYPERV_HCALL: u32 = 2;
pub const KVM_EXIT_HYPERV_SYNDBG: u32 = 3;
pub const KVM_EXIT_XEN_HCALL: u32 = 1;
pub const KVM_S390_GET_SKEYS_NONE: u32 = 1;
pub const KVM_S390_SKEYS_MAX: u32 = 1048576;
pub const KVM_EXIT_UNKNOWN: u32 = 0;
pub const KVM_EXIT_EXCEPTION: u32 = 1;
pub const KVM_EXIT_IO: u32 = 2;
pub const KVM_EXIT_HYPERCALL: u32 = 3;
pub const KVM_EXIT_DEBUG: u32 = 4;
pub const KVM_EXIT_HLT: u32 = 5;
pub const KVM_EXIT_MMIO: u32 = 6;
pub const KVM_EXIT_IRQ_WINDOW_OPEN: u32 = 7;
pub const KVM_EXIT_SHUTDOWN: u32 = 8;
pub const KVM_EXIT_FAIL_ENTRY: u32 = 9;
pub const KVM_EXIT_INTR: u32 = 10;
pub const KVM_EXIT_SET_TPR: u32 = 11;
pub const KVM_EXIT_TPR_ACCESS: u32 = 12;
pub const KVM_EXIT_S390_SIEIC: u32 = 13;
pub const KVM_EXIT_S390_RESET: u32 = 14;
pub const KVM_EXIT_DCR: u32 = 15;
pub const KVM_EXIT_NMI: u32 = 16;
pub const KVM_EXIT_INTERNAL_ERROR: u32 = 17;
pub const KVM_EXIT_OSI: u32 = 18;
pub const KVM_EXIT_PAPR_HCALL: u32 = 19;
pub const KVM_EXIT_S390_UCONTROL: u32 = 20;
pub const KVM_EXIT_WATCHDOG: u32 = 21;
pub const KVM_EXIT_S390_TSCH: u32 = 22;
pub const KVM_EXIT_EPR: u32 = 23;
pub const KVM_EXIT_SYSTEM_EVENT: u32 = 24;
pub const KVM_EXIT_S390_STSI: u32 = 25;
pub const KVM_EXIT_IOAPIC_EOI: u32 = 26;
pub const KVM_EXIT_HYPERV: u32 = 27;
pub const KVM_EXIT_ARM_NISV: u32 = 28;
pub const KVM_EXIT_X86_RDMSR: u32 = 29;
pub const KVM_EXIT_X86_WRMSR: u32 = 30;
pub const KVM_EXIT_DIRTY_RING_FULL: u32 = 31;
pub const KVM_EXIT_AP_RESET_HOLD: u32 = 32;
pub const KVM_EXIT_X86_BUS_LOCK: u32 = 33;
pub const KVM_EXIT_XEN: u32 = 34;
pub const KVM_EXIT_RISCV_SBI: u32 = 35;
pub const KVM_EXIT_RISCV_CSR: u32 = 36;
pub const KVM_EXIT_NOTIFY: u32 = 37;
pub const KVM_EXIT_LOONGARCH_IOCSR: u32 = 38;
pub const KVM_EXIT_MEMORY_FAULT: u32 = 39;
pub const KVM_INTERNAL_ERROR_EMULATION: u32 = 1;
pub const KVM_INTERNAL_ERROR_SIMUL_EX: u32 = 2;
pub const KVM_INTERNAL_ERROR_DELIVERY_EV: u32 = 3;
pub const KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON: u32 = 4;
pub const KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES: u32 = 1;
pub const KVM_EXIT_IO_IN: u32 = 0;
pub const KVM_EXIT_IO_OUT: u32 = 1;
pub const KVM_SYSTEM_EVENT_SHUTDOWN: u32 = 1;
pub const KVM_SYSTEM_EVENT_RESET: u32 = 2;
pub const KVM_SYSTEM_EVENT_CRASH: u32 = 3;
pub const KVM_SYSTEM_EVENT_WAKEUP: u32 = 4;
pub const KVM_SYSTEM_EVENT_SUSPEND: u32 = 5;
pub const KVM_SYSTEM_EVENT_SEV_TERM: u32 = 6;
pub const KVM_MSR_EXIT_REASON_INVAL: u32 = 1;
pub const KVM_MSR_EXIT_REASON_UNKNOWN: u32 = 2;
pub const KVM_MSR_EXIT_REASON_FILTER: u32 = 4;
pub const KVM_MSR_EXIT_REASON_VALID_MASK: u32 = 7;
pub const KVM_NOTIFY_CONTEXT_INVALID: u32 = 1;
pub const KVM_MEMORY_EXIT_FLAG_PRIVATE: u32 = 8;
pub const SYNC_REGS_SIZE_BYTES: u32 = 2048;
pub const KVM_MP_STATE_RUNNABLE: u32 = 0;
pub const KVM_MP_STATE_UNINITIALIZED: u32 = 1;
pub const KVM_MP_STATE_INIT_RECEIVED: u32 = 2;
pub const KVM_MP_STATE_HALTED: u32 = 3;
pub const KVM_MP_STATE_SIPI_RECEIVED: u32 = 4;
pub const KVM_MP_STATE_STOPPED: u32 = 5;
pub const KVM_MP_STATE_CHECK_STOP: u32 = 6;
pub const KVM_MP_STATE_OPERATING: u32 = 7;
pub const KVM_MP_STATE_LOAD: u32 = 8;
pub const KVM_MP_STATE_AP_RESET_HOLD: u32 = 9;
pub const KVM_MP_STATE_SUSPENDED: u32 = 10;
pub const KVM_GUESTDBG_ENABLE: u32 = 1;
pub const KVM_GUESTDBG_SINGLESTEP: u32 = 2;
pub const KVM_X86_DISABLE_EXITS_MWAIT: u32 = 1;
pub const KVM_X86_DISABLE_EXITS_HLT: u32 = 2;
pub const KVM_X86_DISABLE_EXITS_PAUSE: u32 = 4;
pub const KVM_X86_DISABLE_EXITS_CSTATE: u32 = 8;
pub const KVMIO: u32 = 174;
pub const KVM_VM_S390_UCONTROL: u32 = 1;
pub const KVM_VM_PPC_HV: u32 = 1;
pub const KVM_VM_PPC_PR: u32 = 2;
pub const KVM_VM_MIPS_AUTO: u32 = 0;
pub const KVM_VM_MIPS_VZ: u32 = 1;
pub const KVM_VM_MIPS_TE: u32 = 2;
pub const KVM_S390_SIE_PAGE_OFFSET: u32 = 1;
pub const KVM_VM_TYPE_ARM_IPA_SIZE_MASK: u32 = 255;
pub const KVM_CAP_IRQCHIP: u32 = 0;
pub const KVM_CAP_HLT: u32 = 1;
pub const KVM_CAP_MMU_SHADOW_CACHE_CONTROL: u32 = 2;
pub const KVM_CAP_USER_MEMORY: u32 = 3;
pub const KVM_CAP_SET_TSS_ADDR: u32 = 4;
pub const KVM_CAP_VAPIC: u32 = 6;
pub const KVM_CAP_EXT_CPUID: u32 = 7;
pub const KVM_CAP_CLOCKSOURCE: u32 = 8;
pub const KVM_CAP_NR_VCPUS: u32 = 9;
pub const KVM_CAP_NR_MEMSLOTS: u32 = 10;
pub const KVM_CAP_PIT: u32 = 11;
pub const KVM_CAP_NOP_IO_DELAY: u32 = 12;
pub const KVM_CAP_PV_MMU: u32 = 13;
pub const KVM_CAP_MP_STATE: u32 = 14;
pub const KVM_CAP_COALESCED_MMIO: u32 = 15;
pub const KVM_CAP_SYNC_MMU: u32 = 16;
pub const KVM_CAP_IOMMU: u32 = 18;
pub const KVM_CAP_DESTROY_MEMORY_REGION_WORKS: u32 = 21;
pub const KVM_CAP_USER_NMI: u32 = 22;
pub const KVM_CAP_SET_GUEST_DEBUG: u32 = 23;
pub const KVM_CAP_IRQ_ROUTING: u32 = 25;
pub const KVM_CAP_IRQ_INJECT_STATUS: u32 = 26;
pub const KVM_CAP_ASSIGN_DEV_IRQ: u32 = 29;
pub const KVM_CAP_JOIN_MEMORY_REGIONS_WORKS: u32 = 30;
pub const KVM_CAP_IRQFD: u32 = 32;
pub const KVM_CAP_SET_BOOT_CPU_ID: u32 = 34;
pub const KVM_CAP_IOEVENTFD: u32 = 36;
pub const KVM_CAP_SET_IDENTITY_MAP_ADDR: u32 = 37;
pub const KVM_CAP_ADJUST_CLOCK: u32 = 39;
pub const KVM_CAP_INTERNAL_ERROR_DATA: u32 = 40;
pub const KVM_CAP_S390_PSW: u32 = 42;
pub const KVM_CAP_PPC_SEGSTATE: u32 = 43;
pub const KVM_CAP_HYPERV: u32 = 44;
pub const KVM_CAP_HYPERV_VAPIC: u32 = 45;
pub const KVM_CAP_HYPERV_SPIN: u32 = 46;
pub const KVM_CAP_PCI_SEGMENT: u32 = 47;
pub const KVM_CAP_PPC_PAIRED_SINGLES: u32 = 48;
pub const KVM_CAP_INTR_SHADOW: u32 = 49;
pub const KVM_CAP_X86_ROBUST_SINGLESTEP: u32 = 51;
pub const KVM_CAP_PPC_OSI: u32 = 52;
pub const KVM_CAP_PPC_UNSET_IRQ: u32 = 53;
pub const KVM_CAP_ENABLE_CAP: u32 = 54;
pub const KVM_CAP_PPC_GET_PVINFO: u32 = 57;
pub const KVM_CAP_PPC_IRQ_LEVEL: u32 = 58;
pub const KVM_CAP_ASYNC_PF: u32 = 59;
pub const KVM_CAP_TSC_CONTROL: u32 = 60;
pub const KVM_CAP_GET_TSC_KHZ: u32 = 61;
pub const KVM_CAP_PPC_BOOKE_SREGS: u32 = 62;
pub const KVM_CAP_SPAPR_TCE: u32 = 63;
pub const KVM_CAP_PPC_SMT: u32 = 64;
pub const KVM_CAP_PPC_RMA: u32 = 65;
pub const KVM_CAP_MAX_VCPUS: u32 = 66;
pub const KVM_CAP_PPC_HIOR: u32 = 67;
pub const KVM_CAP_PPC_PAPR: u32 = 68;
pub const KVM_CAP_SW_TLB: u32 = 69;
pub const KVM_CAP_ONE_REG: u32 = 70;
pub const KVM_CAP_S390_GMAP: u32 = 71;
pub const KVM_CAP_TSC_DEADLINE_TIMER: u32 = 72;
pub const KVM_CAP_S390_UCONTROL: u32 = 73;
pub const KVM_CAP_SYNC_REGS: u32 = 74;
pub const KVM_CAP_PCI_2_3: u32 = 75;
pub const KVM_CAP_KVMCLOCK_CTRL: u32 = 76;
pub const KVM_CAP_SIGNAL_MSI: u32 = 77;
pub const KVM_CAP_PPC_GET_SMMU_INFO: u32 = 78;
pub const KVM_CAP_S390_COW: u32 = 79;
pub const KVM_CAP_PPC_ALLOC_HTAB: u32 = 80;
pub const KVM_CAP_READONLY_MEM: u32 = 81;
pub const KVM_CAP_IRQFD_RESAMPLE: u32 = 82;
pub const KVM_CAP_PPC_BOOKE_WATCHDOG: u32 = 83;
pub const KVM_CAP_PPC_HTAB_FD: u32 = 84;
pub const KVM_CAP_S390_CSS_SUPPORT: u32 = 85;
pub const KVM_CAP_PPC_EPR: u32 = 86;
pub const KVM_CAP_ARM_PSCI: u32 = 87;
pub const KVM_CAP_ARM_SET_DEVICE_ADDR: u32 = 88;
pub const KVM_CAP_DEVICE_CTRL: u32 = 89;
pub const KVM_CAP_IRQ_MPIC: u32 = 90;
pub const KVM_CAP_PPC_RTAS: u32 = 91;
pub const KVM_CAP_IRQ_XICS: u32 = 92;
pub const KVM_CAP_ARM_EL1_32BIT: u32 = 93;
pub const KVM_CAP_SPAPR_MULTITCE: u32 = 94;
pub const KVM_CAP_EXT_EMUL_CPUID: u32 = 95;
pub const KVM_CAP_HYPERV_TIME: u32 = 96;
pub const KVM_CAP_IOAPIC_POLARITY_IGNORED: u32 = 97;
pub const KVM_CAP_ENABLE_CAP_VM: u32 = 98;
pub const KVM_CAP_S390_IRQCHIP: u32 = 99;
pub const KVM_CAP_IOEVENTFD_NO_LENGTH: u32 = 100;
pub const KVM_CAP_VM_ATTRIBUTES: u32 = 101;
pub const KVM_CAP_ARM_PSCI_0_2: u32 = 102;
pub const KVM_CAP_PPC_FIXUP_HCALL: u32 = 103;
pub const KVM_CAP_PPC_ENABLE_HCALL: u32 = 104;
pub const KVM_CAP_CHECK_EXTENSION_VM: u32 = 105;
pub const KVM_CAP_S390_USER_SIGP: u32 = 106;
pub const KVM_CAP_S390_VECTOR_REGISTERS: u32 = 107;
pub const KVM_CAP_S390_MEM_OP: u32 = 108;
pub const KVM_CAP_S390_USER_STSI: u32 = 109;
pub const KVM_CAP_S390_SKEYS: u32 = 110;
pub const KVM_CAP_MIPS_FPU: u32 = 111;
pub const KVM_CAP_MIPS_MSA: u32 = 112;
pub const KVM_CAP_S390_INJECT_IRQ: u32 = 113;
pub const KVM_CAP_S390_IRQ_STATE: u32 = 114;
pub const KVM_CAP_PPC_HWRNG: u32 = 115;
pub const KVM_CAP_DISABLE_QUIRKS: u32 = 116;
pub const KVM_CAP_X86_SMM: u32 = 117;
pub const KVM_CAP_MULTI_ADDRESS_SPACE: u32 = 118;
pub const KVM_CAP_GUEST_DEBUG_HW_BPS: u32 = 119;
pub const KVM_CAP_GUEST_DEBUG_HW_WPS: u32 = 120;
pub const KVM_CAP_SPLIT_IRQCHIP: u32 = 121;
pub const KVM_CAP_IOEVENTFD_ANY_LENGTH: u32 = 122;
pub const KVM_CAP_HYPERV_SYNIC: u32 = 123;
pub const KVM_CAP_S390_RI: u32 = 124;
pub const KVM_CAP_SPAPR_TCE_64: u32 = 125;
pub const KVM_CAP_ARM_PMU_V3: u32 = 126;
pub const KVM_CAP_VCPU_ATTRIBUTES: u32 = 127;
pub const KVM_CAP_MAX_VCPU_ID: u32 = 128;
pub const KVM_CAP_X2APIC_API: u32 = 129;
pub const KVM_CAP_S390_USER_INSTR0: u32 = 130;
pub const KVM_CAP_MSI_DEVID: u32 = 131;
pub const KVM_CAP_PPC_HTM: u32 = 132;
pub const KVM_CAP_SPAPR_RESIZE_HPT: u32 = 133;
pub const KVM_CAP_PPC_MMU_RADIX: u32 = 134;
pub const KVM_CAP_PPC_MMU_HASH_V3: u32 = 135;
pub const KVM_CAP_IMMEDIATE_EXIT: u32 = 136;
pub const KVM_CAP_MIPS_VZ: u32 = 137;
pub const KVM_CAP_MIPS_TE: u32 = 138;
pub const KVM_CAP_MIPS_64BIT: u32 = 139;
pub const KVM_CAP_S390_GS: u32 = 140;
pub const KVM_CAP_S390_AIS: u32 = 141;
pub const KVM_CAP_SPAPR_TCE_VFIO: u32 = 142;
pub const KVM_CAP_X86_DISABLE_EXITS: u32 = 143;
pub const KVM_CAP_ARM_USER_IRQ: u32 = 144;
pub const KVM_CAP_S390_CMMA_MIGRATION: u32 = 145;
pub const KVM_CAP_PPC_FWNMI: u32 = 146;
pub const KVM_CAP_PPC_SMT_POSSIBLE: u32 = 147;
pub const KVM_CAP_HYPERV_SYNIC2: u32 = 148;
pub const KVM_CAP_HYPERV_VP_INDEX: u32 = 149;
pub const KVM_CAP_S390_AIS_MIGRATION: u32 = 150;
pub const KVM_CAP_PPC_GET_CPU_CHAR: u32 = 151;
pub const KVM_CAP_S390_BPB: u32 = 152;
pub const KVM_CAP_GET_MSR_FEATURES: u32 = 153;
pub const KVM_CAP_HYPERV_EVENTFD: u32 = 154;
pub const KVM_CAP_HYPERV_TLBFLUSH: u32 = 155;
pub const KVM_CAP_S390_HPAGE_1M: u32 = 156;
pub const KVM_CAP_NESTED_STATE: u32 = 157;
pub const KVM_CAP_ARM_INJECT_SERROR_ESR: u32 = 158;
pub const KVM_CAP_MSR_PLATFORM_INFO: u32 = 159;
pub const KVM_CAP_PPC_NESTED_HV: u32 = 160;
pub const KVM_CAP_HYPERV_SEND_IPI: u32 = 161;
pub const KVM_CAP_COALESCED_PIO: u32 = 162;
pub const KVM_CAP_HYPERV_ENLIGHTENED_VMCS: u32 = 163;
pub const KVM_CAP_EXCEPTION_PAYLOAD: u32 = 164;
pub const KVM_CAP_ARM_VM_IPA_SIZE: u32 = 165;
pub const KVM_CAP_MANUAL_DIRTY_LOG_PROTECT: u32 = 166;
pub const KVM_CAP_HYPERV_CPUID: u32 = 167;
pub const KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2: u32 = 168;
pub const KVM_CAP_PPC_IRQ_XIVE: u32 = 169;
pub const KVM_CAP_ARM_SVE: u32 = 170;
pub const KVM_CAP_ARM_PTRAUTH_ADDRESS: u32 = 171;
pub const KVM_CAP_ARM_PTRAUTH_GENERIC: u32 = 172;
pub const KVM_CAP_PMU_EVENT_FILTER: u32 = 173;
pub const KVM_CAP_ARM_IRQ_LINE_LAYOUT_2: u32 = 174;
pub const KVM_CAP_HYPERV_DIRECT_TLBFLUSH: u32 = 175;
pub const KVM_CAP_PPC_GUEST_DEBUG_SSTEP: u32 = 176;
pub const KVM_CAP_ARM_NISV_TO_USER: u32 = 177;
pub const KVM_CAP_ARM_INJECT_EXT_DABT: u32 = 178;
pub const KVM_CAP_S390_VCPU_RESETS: u32 = 179;
pub const KVM_CAP_S390_PROTECTED: u32 = 180;
pub const KVM_CAP_PPC_SECURE_GUEST: u32 = 181;
pub const KVM_CAP_HALT_POLL: u32 = 182;
pub const KVM_CAP_ASYNC_PF_INT: u32 = 183;
pub const KVM_CAP_LAST_CPU: u32 = 184;
pub const KVM_CAP_SMALLER_MAXPHYADDR: u32 = 185;
pub const KVM_CAP_S390_DIAG318: u32 = 186;
pub const KVM_CAP_STEAL_TIME: u32 = 187;
pub const KVM_CAP_X86_USER_SPACE_MSR: u32 = 188;
pub const KVM_CAP_X86_MSR_FILTER: u32 = 189;
pub const KVM_CAP_ENFORCE_PV_FEATURE_CPUID: u32 = 190;
pub const KVM_CAP_SYS_HYPERV_CPUID: u32 = 191;
pub const KVM_CAP_DIRTY_LOG_RING: u32 = 192;
pub const KVM_CAP_X86_BUS_LOCK_EXIT: u32 = 193;
pub const KVM_CAP_PPC_DAWR1: u32 = 194;
pub const KVM_CAP_SET_GUEST_DEBUG2: u32 = 195;
pub const KVM_CAP_SGX_ATTRIBUTE: u32 = 196;
pub const KVM_CAP_VM_COPY_ENC_CONTEXT_FROM: u32 = 197;
pub const KVM_CAP_PTP_KVM: u32 = 198;
pub const KVM_CAP_HYPERV_ENFORCE_CPUID: u32 = 199;
pub const KVM_CAP_SREGS2: u32 = 200;
pub const KVM_CAP_EXIT_HYPERCALL: u32 = 201;
pub const KVM_CAP_PPC_RPT_INVALIDATE: u32 = 202;
pub const KVM_CAP_BINARY_STATS_FD: u32 = 203;
pub const KVM_CAP_EXIT_ON_EMULATION_FAILURE: u32 = 204;
pub const KVM_CAP_ARM_MTE: u32 = 205;
pub const KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM: u32 = 206;
pub const KVM_CAP_VM_GPA_BITS: u32 = 207;
pub const KVM_CAP_XSAVE2: u32 = 208;
pub const KVM_CAP_SYS_ATTRIBUTES: u32 = 209;
pub const KVM_CAP_PPC_AIL_MODE_3: u32 = 210;
pub const KVM_CAP_S390_MEM_OP_EXTENSION: u32 = 211;
pub const KVM_CAP_PMU_CAPABILITY: u32 = 212;
pub const KVM_CAP_DISABLE_QUIRKS2: u32 = 213;
pub const KVM_CAP_VM_TSC_CONTROL: u32 = 214;
pub const KVM_CAP_SYSTEM_EVENT_DATA: u32 = 215;
pub const KVM_CAP_ARM_SYSTEM_SUSPEND: u32 = 216;
pub const KVM_CAP_S390_PROTECTED_DUMP: u32 = 217;
pub const KVM_CAP_X86_TRIPLE_FAULT_EVENT: u32 = 218;
pub const KVM_CAP_X86_NOTIFY_VMEXIT: u32 = 219;
pub const KVM_CAP_VM_DISABLE_NX_HUGE_PAGES: u32 = 220;
pub const KVM_CAP_S390_ZPCI_OP: u32 = 221;
pub const KVM_CAP_S390_CPU_TOPOLOGY: u32 = 222;
pub const KVM_CAP_DIRTY_LOG_RING_ACQ_REL: u32 = 223;
pub const KVM_CAP_S390_PROTECTED_ASYNC_DISABLE: u32 = 224;
pub const KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP: u32 = 225;
pub const KVM_CAP_PMU_EVENT_MASKED_EVENTS: u32 = 226;
pub const KVM_CAP_COUNTER_OFFSET: u32 = 227;
pub const KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE: u32 = 228;
pub const KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES: u32 = 229;
pub const KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES: u32 = 230;
pub const KVM_CAP_USER_MEMORY2: u32 = 231;
pub const KVM_CAP_MEMORY_FAULT_INFO: u32 = 232;
pub const KVM_CAP_MEMORY_ATTRIBUTES: u32 = 233;
pub const KVM_CAP_GUEST_MEMFD: u32 = 234;
pub const KVM_CAP_VM_TYPES: u32 = 235;
pub const KVM_CAP_PRE_FAULT_MEMORY: u32 = 236;
pub const KVM_CAP_X86_APIC_BUS_CYCLES_NS: u32 = 237;
pub const KVM_CAP_X86_GUEST_MODE: u32 = 238;
pub const KVM_CAP_ARM_WRITABLE_IMP_ID_REGS: u32 = 239;
pub const KVM_IRQ_ROUTING_IRQCHIP: u32 = 1;
pub const KVM_IRQ_ROUTING_MSI: u32 = 2;
pub const KVM_IRQ_ROUTING_S390_ADAPTER: u32 = 3;
pub const KVM_IRQ_ROUTING_HV_SINT: u32 = 4;
pub const KVM_IRQ_ROUTING_XEN_EVTCHN: u32 = 5;
pub const KVM_IRQFD_FLAG_DEASSIGN: u32 = 1;
pub const KVM_IRQFD_FLAG_RESAMPLE: u32 = 2;
pub const KVM_CLOCK_TSC_STABLE: u32 = 2;
pub const KVM_CLOCK_REALTIME: u32 = 4;
pub const KVM_CLOCK_HOST_TSC: u32 = 8;
pub const KVM_MMU_FSL_BOOKE_NOHV: u32 = 0;
pub const KVM_MMU_FSL_BOOKE_HV: u32 = 1;
pub const KVM_REG_ARCH_MASK: i64 = -72057594037927936;
pub const KVM_REG_GENERIC: u32 = 0;
pub const KVM_REG_PPC: u64 = 1152921504606846976;
pub const KVM_REG_X86: u64 = 2305843009213693952;
pub const KVM_REG_IA64: u64 = 3458764513820540928;
pub const KVM_REG_ARM: u64 = 4611686018427387904;
pub const KVM_REG_S390: u64 = 5764607523034234880;
pub const KVM_REG_ARM64: u64 = 6917529027641081856;
pub const KVM_REG_MIPS: u64 = 8070450532247928832;
pub const KVM_REG_RISCV: i64 = -9223372036854775808;
pub const KVM_REG_LOONGARCH: i64 = -8070450532247928832;
pub const KVM_REG_SIZE_SHIFT: u32 = 52;
pub const KVM_REG_SIZE_MASK: u64 = 67553994410557440;
pub const KVM_REG_SIZE_U8: u32 = 0;
pub const KVM_REG_SIZE_U16: u64 = 4503599627370496;
pub const KVM_REG_SIZE_U32: u64 = 9007199254740992;
pub const KVM_REG_SIZE_U64: u64 = 13510798882111488;
pub const KVM_REG_SIZE_U128: u64 = 18014398509481984;
pub const KVM_REG_SIZE_U256: u64 = 22517998136852480;
pub const KVM_REG_SIZE_U512: u64 = 27021597764222976;
pub const KVM_REG_SIZE_U1024: u64 = 31525197391593472;
pub const KVM_REG_SIZE_U2048: u64 = 36028797018963968;
pub const KVM_MSI_VALID_DEVID: u32 = 1;
pub const KVM_CREATE_DEVICE_TEST: u32 = 1;
pub const KVM_DEV_VFIO_FILE: u32 = 1;
pub const KVM_DEV_VFIO_FILE_ADD: u32 = 1;
pub const KVM_DEV_VFIO_FILE_DEL: u32 = 2;
pub const KVM_DEV_VFIO_GROUP: u32 = 1;
pub const KVM_DEV_VFIO_GROUP_ADD: u32 = 1;
pub const KVM_DEV_VFIO_GROUP_DEL: u32 = 2;
pub const KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE: u32 = 3;
pub const KVM_S390_STORE_STATUS_NOADDR: i32 = -1;
pub const KVM_S390_STORE_STATUS_PREFIXED: i32 = -2;
pub const KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE: u32 = 1;
pub const KVM_DIRTY_LOG_INITIALLY_SET: u32 = 2;
pub const KVM_DIRTY_LOG_PAGE_OFFSET: u32 = 0;
pub const KVM_DIRTY_GFN_F_MASK: u32 = 3;
pub const KVM_BUS_LOCK_DETECTION_OFF: u32 = 1;
pub const KVM_BUS_LOCK_DETECTION_EXIT: u32 = 2;
pub const KVM_PMU_CAP_DISABLE: u32 = 1;
pub const KVM_STATS_TYPE_SHIFT: u32 = 0;
pub const KVM_STATS_TYPE_MASK: u32 = 15;
pub const KVM_STATS_TYPE_CUMULATIVE: u32 = 0;
pub const KVM_STATS_TYPE_INSTANT: u32 = 1;
pub const KVM_STATS_TYPE_PEAK: u32 = 2;
pub const KVM_STATS_TYPE_LINEAR_HIST: u32 = 3;
pub const KVM_STATS_TYPE_LOG_HIST: u32 = 4;
pub const KVM_STATS_TYPE_MAX: u32 = 4;
pub const KVM_STATS_UNIT_SHIFT: u32 = 4;
pub const KVM_STATS_UNIT_MASK: u32 = 240;
pub const KVM_STATS_UNIT_NONE: u32 = 0;
pub const KVM_STATS_UNIT_BYTES: u32 = 16;
pub const KVM_STATS_UNIT_SECONDS: u32 = 32;
pub const KVM_STATS_UNIT_CYCLES: u32 = 48;
pub const KVM_STATS_UNIT_BOOLEAN: u32 = 64;
pub const KVM_STATS_UNIT_MAX: u32 = 64;
pub const KVM_STATS_BASE_SHIFT: u32 = 8;
pub const KVM_STATS_BASE_MASK: u32 = 3840;
pub const KVM_STATS_BASE_POW10: u32 = 0;
pub const KVM_STATS_BASE_POW2: u32 = 256;
pub const KVM_STATS_BASE_MAX: u32 = 256;
pub const KVM_X86_NOTIFY_VMEXIT_ENABLED: u32 = 1;
pub const KVM_X86_NOTIFY_VMEXIT_USER: u32 = 2;
pub const KVM_MEMORY_ATTRIBUTE_PRIVATE: u32 = 8;
pub type __s8 = ::std::os::raw::c_schar;
pub type __u8 = ::std::os::raw::c_uchar;
pub type __s16 = ::std::os::raw::c_short;
pub type __u16 = ::std::os::raw::c_ushort;
pub type __s32 = ::std::os::raw::c_int;
pub type __u32 = ::std::os::raw::c_uint;
pub type __s64 = ::std::os::raw::c_longlong;
pub type __u64 = ::std::os::raw::c_ulonglong;
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct __kernel_fd_set {
pub fds_bits: [::std::os::raw::c_ulong; 16usize],
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __kernel_fd_set"][::std::mem::size_of::<__kernel_fd_set>() - 128usize];
["Alignment of __kernel_fd_set"][::std::mem::align_of::<__kernel_fd_set>() - 8usize];
["Offset of field: __kernel_fd_set::fds_bits"]
[::std::mem::offset_of!(__kernel_fd_set, fds_bits) - 0usize];
};
pub type __kernel_sighandler_t =
::std::option::Option<unsafe extern "C" fn(arg1: ::std::os::raw::c_int)>;
pub type __kernel_key_t = ::std::os::raw::c_int;
pub type __kernel_mqd_t = ::std::os::raw::c_int;
pub type __kernel_long_t = ::std::os::raw::c_long;
pub type __kernel_ulong_t = ::std::os::raw::c_ulong;
pub type __kernel_ino_t = __kernel_ulong_t;
pub type __kernel_mode_t = ::std::os::raw::c_uint;
pub type __kernel_pid_t = ::std::os::raw::c_int;
pub type __kernel_ipc_pid_t = ::std::os::raw::c_int;
pub type __kernel_uid_t = ::std::os::raw::c_uint;
pub type __kernel_gid_t = ::std::os::raw::c_uint;
pub type __kernel_suseconds_t = __kernel_long_t;
pub type __kernel_daddr_t = ::std::os::raw::c_int;
pub type __kernel_uid32_t = ::std::os::raw::c_uint;
pub type __kernel_gid32_t = ::std::os::raw::c_uint;
pub type __kernel_old_uid_t = __kernel_uid_t;
pub type __kernel_old_gid_t = __kernel_gid_t;
pub type __kernel_old_dev_t = ::std::os::raw::c_uint;
pub type __kernel_size_t = __kernel_ulong_t;
pub type __kernel_ssize_t = __kernel_long_t;
pub type __kernel_ptrdiff_t = __kernel_long_t;
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct __kernel_fsid_t {
pub val: [::std::os::raw::c_int; 2usize],
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __kernel_fsid_t"][::std::mem::size_of::<__kernel_fsid_t>() - 8usize];
["Alignment of __kernel_fsid_t"][::std::mem::align_of::<__kernel_fsid_t>() - 4usize];
["Offset of field: __kernel_fsid_t::val"]
[::std::mem::offset_of!(__kernel_fsid_t, val) - 0usize];
};
pub type __kernel_off_t = __kernel_long_t;
pub type __kernel_loff_t = ::std::os::raw::c_longlong;
pub type __kernel_old_time_t = __kernel_long_t;
pub type __kernel_time_t = __kernel_long_t;
pub type __kernel_time64_t = ::std::os::raw::c_longlong;
pub type __kernel_clock_t = __kernel_long_t;
pub type __kernel_timer_t = ::std::os::raw::c_int;
pub type __kernel_clockid_t = ::std::os::raw::c_int;
pub type __kernel_caddr_t = *mut ::std::os::raw::c_char;
pub type __kernel_uid16_t = ::std::os::raw::c_ushort;
pub type __kernel_gid16_t = ::std::os::raw::c_ushort;
pub type __s128 = i128;
pub type __u128 = u128;
pub type __le16 = __u16;
pub type __be16 = __u16;
pub type __le32 = __u32;
pub type __be32 = __u32;
pub type __le64 = __u64;
pub type __be64 = __u64;
pub type __sum16 = __u16;
pub type __wsum = __u32;
pub type __poll_t = ::std::os::raw::c_uint;
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
#[cfg_attr(
feature = "serde",
derive(zerocopy::IntoBytes, zerocopy::Immutable, zerocopy::FromBytes)
)]
pub struct user_regs_struct {
pub pc: ::std::os::raw::c_ulong,
pub ra: ::std::os::raw::c_ulong,
pub sp: ::std::os::raw::c_ulong,
pub gp: ::std::os::raw::c_ulong,
pub tp: ::std::os::raw::c_ulong,
pub t0: ::std::os::raw::c_ulong,
pub t1: ::std::os::raw::c_ulong,
pub t2: ::std::os::raw::c_ulong,
pub s0: ::std::os::raw::c_ulong,
pub s1: ::std::os::raw::c_ulong,
pub a0: ::std::os::raw::c_ulong,
pub a1: ::std::os::raw::c_ulong,
pub a2: ::std::os::raw::c_ulong,
pub a3: ::std::os::raw::c_ulong,
pub a4: ::std::os::raw::c_ulong,
pub a5: ::std::os::raw::c_ulong,
pub a6: ::std::os::raw::c_ulong,
pub a7: ::std::os::raw::c_ulong,
pub s2: ::std::os::raw::c_ulong,
pub s3: ::std::os::raw::c_ulong,
pub s4: ::std::os::raw::c_ulong,
pub s5: ::std::os::raw::c_ulong,
pub s6: ::std::os::raw::c_ulong,
pub s7: ::std::os::raw::c_ulong,
pub s8: ::std::os::raw::c_ulong,
pub s9: ::std::os::raw::c_ulong,
pub s10: ::std::os::raw::c_ulong,
pub s11: ::std::os::raw::c_ulong,
pub t3: ::std::os::raw::c_ulong,
pub t4: ::std::os::raw::c_ulong,
pub t5: ::std::os::raw::c_ulong,
pub t6: ::std::os::raw::c_ulong,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of user_regs_struct"][::std::mem::size_of::<user_regs_struct>() - 256usize];
["Alignment of user_regs_struct"][::std::mem::align_of::<user_regs_struct>() - 8usize];
["Offset of field: user_regs_struct::pc"]
[::std::mem::offset_of!(user_regs_struct, pc) - 0usize];
["Offset of field: user_regs_struct::ra"]
[::std::mem::offset_of!(user_regs_struct, ra) - 8usize];
["Offset of field: user_regs_struct::sp"]
[::std::mem::offset_of!(user_regs_struct, sp) - 16usize];
["Offset of field: user_regs_struct::gp"]
[::std::mem::offset_of!(user_regs_struct, gp) - 24usize];
["Offset of field: user_regs_struct::tp"]
[::std::mem::offset_of!(user_regs_struct, tp) - 32usize];
["Offset of field: user_regs_struct::t0"]
[::std::mem::offset_of!(user_regs_struct, t0) - 40usize];
["Offset of field: user_regs_struct::t1"]
[::std::mem::offset_of!(user_regs_struct, t1) - 48usize];
["Offset of field: user_regs_struct::t2"]
[::std::mem::offset_of!(user_regs_struct, t2) - 56usize];
["Offset of field: user_regs_struct::s0"]
[::std::mem::offset_of!(user_regs_struct, s0) - 64usize];
["Offset of field: user_regs_struct::s1"]
[::std::mem::offset_of!(user_regs_struct, s1) - 72usize];
["Offset of field: user_regs_struct::a0"]
[::std::mem::offset_of!(user_regs_struct, a0) - 80usize];
["Offset of field: user_regs_struct::a1"]
[::std::mem::offset_of!(user_regs_struct, a1) - 88usize];
["Offset of field: user_regs_struct::a2"]
[::std::mem::offset_of!(user_regs_struct, a2) - 96usize];
["Offset of field: user_regs_struct::a3"]
[::std::mem::offset_of!(user_regs_struct, a3) - 104usize];
["Offset of field: user_regs_struct::a4"]
[::std::mem::offset_of!(user_regs_struct, a4) - 112usize];
["Offset of field: user_regs_struct::a5"]
[::std::mem::offset_of!(user_regs_struct, a5) - 120usize];
["Offset of field: user_regs_struct::a6"]
[::std::mem::offset_of!(user_regs_struct, a6) - 128usize];
["Offset of field: user_regs_struct::a7"]
[::std::mem::offset_of!(user_regs_struct, a7) - 136usize];
["Offset of field: user_regs_struct::s2"]
[::std::mem::offset_of!(user_regs_struct, s2) - 144usize];
["Offset of field: user_regs_struct::s3"]
[::std::mem::offset_of!(user_regs_struct, s3) - 152usize];
["Offset of field: user_regs_struct::s4"]
[::std::mem::offset_of!(user_regs_struct, s4) - 160usize];
["Offset of field: user_regs_struct::s5"]
[::std::mem::offset_of!(user_regs_struct, s5) - 168usize];
["Offset of field: user_regs_struct::s6"]
[::std::mem::offset_of!(user_regs_struct, s6) - 176usize];
["Offset of field: user_regs_struct::s7"]
[::std::mem::offset_of!(user_regs_struct, s7) - 184usize];
["Offset of field: user_regs_struct::s8"]
[::std::mem::offset_of!(user_regs_struct, s8) - 192usize];
["Offset of field: user_regs_struct::s9"]
[::std::mem::offset_of!(user_regs_struct, s9) - 200usize];
["Offset of field: user_regs_struct::s10"]
[::std::mem::offset_of!(user_regs_struct, s10) - 208usize];
["Offset of field: user_regs_struct::s11"]
[::std::mem::offset_of!(user_regs_struct, s11) - 216usize];
["Offset of field: user_regs_struct::t3"]
[::std::mem::offset_of!(user_regs_struct, t3) - 224usize];
["Offset of field: user_regs_struct::t4"]
[::std::mem::offset_of!(user_regs_struct, t4) - 232usize];
["Offset of field: user_regs_struct::t5"]
[::std::mem::offset_of!(user_regs_struct, t5) - 240usize];
["Offset of field: user_regs_struct::t6"]
[::std::mem::offset_of!(user_regs_struct, t6) - 248usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct __riscv_f_ext_state {
pub f: [__u32; 32usize],
pub fcsr: __u32,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __riscv_f_ext_state"][::std::mem::size_of::<__riscv_f_ext_state>() - 132usize];
["Alignment of __riscv_f_ext_state"][::std::mem::align_of::<__riscv_f_ext_state>() - 4usize];
["Offset of field: __riscv_f_ext_state::f"]
[::std::mem::offset_of!(__riscv_f_ext_state, f) - 0usize];
["Offset of field: __riscv_f_ext_state::fcsr"]
[::std::mem::offset_of!(__riscv_f_ext_state, fcsr) - 128usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct __riscv_d_ext_state {
pub f: [__u64; 32usize],
pub fcsr: __u32,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __riscv_d_ext_state"][::std::mem::size_of::<__riscv_d_ext_state>() - 264usize];
["Alignment of __riscv_d_ext_state"][::std::mem::align_of::<__riscv_d_ext_state>() - 8usize];
["Offset of field: __riscv_d_ext_state::f"]
[::std::mem::offset_of!(__riscv_d_ext_state, f) - 0usize];
["Offset of field: __riscv_d_ext_state::fcsr"]
[::std::mem::offset_of!(__riscv_d_ext_state, fcsr) - 256usize];
};
#[repr(C)]
#[repr(align(16))]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct __riscv_q_ext_state {
pub f: [__u64; 64usize],
pub fcsr: __u32,
pub reserved: [__u32; 3usize],
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __riscv_q_ext_state"][::std::mem::size_of::<__riscv_q_ext_state>() - 528usize];
["Alignment of __riscv_q_ext_state"][::std::mem::align_of::<__riscv_q_ext_state>() - 16usize];
["Offset of field: __riscv_q_ext_state::f"]
[::std::mem::offset_of!(__riscv_q_ext_state, f) - 0usize];
["Offset of field: __riscv_q_ext_state::fcsr"]
[::std::mem::offset_of!(__riscv_q_ext_state, fcsr) - 512usize];
["Offset of field: __riscv_q_ext_state::reserved"]
[::std::mem::offset_of!(__riscv_q_ext_state, reserved) - 516usize];
};
impl Default for __riscv_q_ext_state {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct __riscv_ctx_hdr {
pub magic: __u32,
pub size: __u32,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __riscv_ctx_hdr"][::std::mem::size_of::<__riscv_ctx_hdr>() - 8usize];
["Alignment of __riscv_ctx_hdr"][::std::mem::align_of::<__riscv_ctx_hdr>() - 4usize];
["Offset of field: __riscv_ctx_hdr::magic"]
[::std::mem::offset_of!(__riscv_ctx_hdr, magic) - 0usize];
["Offset of field: __riscv_ctx_hdr::size"]
[::std::mem::offset_of!(__riscv_ctx_hdr, size) - 4usize];
};
#[repr(C)]
#[repr(align(16))]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct __riscv_extra_ext_header {
pub __padding: [__u32; 129usize],
pub reserved: __u32,
pub hdr: __riscv_ctx_hdr,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __riscv_extra_ext_header"]
[::std::mem::size_of::<__riscv_extra_ext_header>() - 528usize];
["Alignment of __riscv_extra_ext_header"]
[::std::mem::align_of::<__riscv_extra_ext_header>() - 16usize];
["Offset of field: __riscv_extra_ext_header::__padding"]
[::std::mem::offset_of!(__riscv_extra_ext_header, __padding) - 0usize];
["Offset of field: __riscv_extra_ext_header::reserved"]
[::std::mem::offset_of!(__riscv_extra_ext_header, reserved) - 516usize];
["Offset of field: __riscv_extra_ext_header::hdr"]
[::std::mem::offset_of!(__riscv_extra_ext_header, hdr) - 520usize];
};
impl Default for __riscv_extra_ext_header {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[repr(align(16))]
#[derive(Copy, Clone)]
pub union __riscv_fp_state {
pub f: __riscv_f_ext_state,
pub d: __riscv_d_ext_state,
pub q: __riscv_q_ext_state,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __riscv_fp_state"][::std::mem::size_of::<__riscv_fp_state>() - 528usize];
["Alignment of __riscv_fp_state"][::std::mem::align_of::<__riscv_fp_state>() - 16usize];
["Offset of field: __riscv_fp_state::f"][::std::mem::offset_of!(__riscv_fp_state, f) - 0usize];
["Offset of field: __riscv_fp_state::d"][::std::mem::offset_of!(__riscv_fp_state, d) - 0usize];
["Offset of field: __riscv_fp_state::q"][::std::mem::offset_of!(__riscv_fp_state, q) - 0usize];
};
impl Default for __riscv_fp_state {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
impl ::std::fmt::Debug for __riscv_fp_state {
fn fmt(&self, f: &mut ::std::fmt::Formatter<'_>) -> ::std::fmt::Result {
write!(f, "__riscv_fp_state {{ union }}")
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct __riscv_v_ext_state {
pub vstart: ::std::os::raw::c_ulong,
pub vl: ::std::os::raw::c_ulong,
pub vtype: ::std::os::raw::c_ulong,
pub vcsr: ::std::os::raw::c_ulong,
pub vlenb: ::std::os::raw::c_ulong,
pub datap: *mut ::std::os::raw::c_void,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __riscv_v_ext_state"][::std::mem::size_of::<__riscv_v_ext_state>() - 48usize];
["Alignment of __riscv_v_ext_state"][::std::mem::align_of::<__riscv_v_ext_state>() - 8usize];
["Offset of field: __riscv_v_ext_state::vstart"]
[::std::mem::offset_of!(__riscv_v_ext_state, vstart) - 0usize];
["Offset of field: __riscv_v_ext_state::vl"]
[::std::mem::offset_of!(__riscv_v_ext_state, vl) - 8usize];
["Offset of field: __riscv_v_ext_state::vtype"]
[::std::mem::offset_of!(__riscv_v_ext_state, vtype) - 16usize];
["Offset of field: __riscv_v_ext_state::vcsr"]
[::std::mem::offset_of!(__riscv_v_ext_state, vcsr) - 24usize];
["Offset of field: __riscv_v_ext_state::vlenb"]
[::std::mem::offset_of!(__riscv_v_ext_state, vlenb) - 32usize];
["Offset of field: __riscv_v_ext_state::datap"]
[::std::mem::offset_of!(__riscv_v_ext_state, datap) - 40usize];
};
impl Default for __riscv_v_ext_state {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default)]
pub struct __riscv_v_regset_state {
pub vstart: ::std::os::raw::c_ulong,
pub vl: ::std::os::raw::c_ulong,
pub vtype: ::std::os::raw::c_ulong,
pub vcsr: ::std::os::raw::c_ulong,
pub vlenb: ::std::os::raw::c_ulong,
pub vreg: __IncompleteArrayField<::std::os::raw::c_char>,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of __riscv_v_regset_state"][::std::mem::size_of::<__riscv_v_regset_state>() - 40usize];
["Alignment of __riscv_v_regset_state"]
[::std::mem::align_of::<__riscv_v_regset_state>() - 8usize];
["Offset of field: __riscv_v_regset_state::vstart"]
[::std::mem::offset_of!(__riscv_v_regset_state, vstart) - 0usize];
["Offset of field: __riscv_v_regset_state::vl"]
[::std::mem::offset_of!(__riscv_v_regset_state, vl) - 8usize];
["Offset of field: __riscv_v_regset_state::vtype"]
[::std::mem::offset_of!(__riscv_v_regset_state, vtype) - 16usize];
["Offset of field: __riscv_v_regset_state::vcsr"]
[::std::mem::offset_of!(__riscv_v_regset_state, vcsr) - 24usize];
["Offset of field: __riscv_v_regset_state::vlenb"]
[::std::mem::offset_of!(__riscv_v_regset_state, vlenb) - 32usize];
["Offset of field: __riscv_v_regset_state::vreg"]
[::std::mem::offset_of!(__riscv_v_regset_state, vreg) - 40usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct kvm_regs {}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of kvm_regs"][::std::mem::size_of::<kvm_regs>() - 0usize];
["Alignment of kvm_regs"][::std::mem::align_of::<kvm_regs>() - 1usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct kvm_fpu {}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of kvm_fpu"][::std::mem::size_of::<kvm_fpu>() - 0usize];
["Alignment of kvm_fpu"][::std::mem::align_of::<kvm_fpu>() - 1usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct kvm_debug_exit_arch {}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of kvm_debug_exit_arch"][::std::mem::size_of::<kvm_debug_exit_arch>() - 0usize];
["Alignment of kvm_debug_exit_arch"][::std::mem::align_of::<kvm_debug_exit_arch>() - 1usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct kvm_guest_debug_arch {}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of kvm_guest_debug_arch"][::std::mem::size_of::<kvm_guest_debug_arch>() - 0usize];
["Alignment of kvm_guest_debug_arch"][::std::mem::align_of::<kvm_guest_debug_arch>() - 1usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct kvm_sync_regs {}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of kvm_sync_regs"][::std::mem::size_of::<kvm_sync_regs>() - 0usize];
["Alignment of kvm_sync_regs"][::std::mem::align_of::<kvm_sync_regs>() - 1usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
pub struct kvm_sregs {}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of kvm_sregs"][::std::mem::size_of::<kvm_sregs>() - 0usize];
["Alignment of kvm_sregs"][::std::mem::align_of::<kvm_sregs>() - 1usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
#[cfg_attr(
feature = "serde",
derive(zerocopy::IntoBytes, zerocopy::Immutable, zerocopy::FromBytes)
)]
pub struct kvm_riscv_config {
pub isa: ::std::os::raw::c_ulong,
pub zicbom_block_size: ::std::os::raw::c_ulong,
pub mvendorid: ::std::os::raw::c_ulong,
pub marchid: ::std::os::raw::c_ulong,
pub mimpid: ::std::os::raw::c_ulong,
pub zicboz_block_size: ::std::os::raw::c_ulong,
pub satp_mode: ::std::os::raw::c_ulong,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]
const _: () = {
["Size of kvm_riscv_config"][::std::mem::size_of::<kvm_riscv_config>() - 56usize];
["Alignment of kvm_riscv_config"][::std::mem::align_of::<kvm_riscv_config>() - 8usize];
["Offset of field: kvm_riscv_config::isa"]
[::std::mem::offset_of!(kvm_riscv_config, isa) - 0usize];
["Offset of field: kvm_riscv_config::zicbom_block_size"]
[::std::mem::offset_of!(kvm_riscv_config, zicbom_block_size) - 8usize];
["Offset of field: kvm_riscv_config::mvendorid"]
[::std::mem::offset_of!(kvm_riscv_config, mvendorid) - 16usize];
["Offset of field: kvm_riscv_config::marchid"]
[::std::mem::offset_of!(kvm_riscv_config, marchid) - 24usize];
["Offset of field: kvm_riscv_config::mimpid"]
[::std::mem::offset_of!(kvm_riscv_config, mimpid) - 32usize];
["Offset of field: kvm_riscv_config::zicboz_block_size"]
[::std::mem::offset_of!(kvm_riscv_config, zicboz_block_size) - 40usize];
["Offset of field: kvm_riscv_config::satp_mode"]
[::std::mem::offset_of!(kvm_riscv_config, satp_mode) - 48usize];
};
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, PartialEq)]
#[cfg_attr(
feature = "serde",
derive(zerocopy::IntoBytes, zerocopy::Immutable, zerocopy::FromBytes)
)]
pub struct kvm_riscv_core {
pub regs: user_regs_struct,
pub mode: ::std::os::raw::c_ulong,
}
#[allow(clippy::unnecessary_operation, clippy::identity_op)]