Compressed instruction support?

[cnlohr]

I have been working with using rv32ima to emulate processors with compressed instruction support.

I haven't fully tested it, and it seems a little buggy with interrupts, but I was wondering if you were interested in pushing for compressed ISA support.

I added support here: https://github.com/cnlohr/beanboy/blob/master/emu/emu_ch570.h#L243-L477

I will note that it is surprisingly nontrivial to implement the -C extension, and that it would add to the size of your emulator. But I was curious your feelings on this sort of thing.

[ringtailsoftware]

I am interested. I have an application in mind for uvm32 where code density is critical. I think I'd want to keep it in an ifdef so there's the option to keep the emulator small.
I had a quick go with the -C code (cnlohr/mini-rv32ima#54) at the weekend, but I think I messed something up. I will take another look.

[ringtailsoftware]

@cnlohr I have it mostly working, but I think it's broken because c.lw/c.sw don't know about the MMIO region. Perhaps that's why it's broken under interrupt for you? Because you're doing IO to peripherals?

https://github.com/ringtailsoftware/uvm32/blob/rv32c/uvm32/rv32c.h#L29
The "rv32c" branch enables the C extension in the examples. Some work, some don't.

[cnlohr]

@cnlohr I have it mostly working, but I think it's broken because c.lw/c.sw don't know about the MMIO region. Perhaps that's why it's broken under interrupt for you? Because you're doing IO to peripherals?

https://github.com/ringtailsoftware/uvm32/blob/rv32c/uvm32/rv32c.h#L29 The "rv32c" branch enables the C extension in the examples. Some work, some don't.

in my code, I overrode the functions to handle for MMIO, but that didn't seem to help. It was something about the calculation for PC that was broken. There are multiple places in mini-rv32ima that assume 4-byte-sized-opcodes. (any of the places you see pc+4, pc-4)