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Fix incompatible mmu-type define (#47)
Per RISC-V CPU Bindings [1], the mmu-type attribute should be set to "riscv,sv32". [1] https://github.com/riscv-non-isa/riscv-device-tree-doc/blob/master/bindings/riscv/cpus.txt
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Diff for: minimal.dts

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@@ -25,7 +25,7 @@
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compatible = "riscv";
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reg = <0>;
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riscv,isa = "rv32ima";
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mmu-type = "riscv,rv32";
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mmu-type = "riscv,sv32";
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cpu0_intc: interrupt-controller {
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#interrupt-cells = <1>;
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#address-cells = <0>;

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