machine,targets: add minimal esp32c6 implementation

This adds a minimal esp32c6 implementation, currently only
supporting the examples/serial and examples/blinky1 programs.
It does correctly output the expected "Hello, World" via the
serial port, as well as blink the onboard LED.

In addition, it adds support for the PLIC based IRQ handling
as used on the ESP32C6 processor.

Some parts of this code are loosely based on PR #5252 and #5248

Signed-off-by: deadprogram <ron@hybridgroup.com>

Author: deadprogram

GNUmakefile

@@ -960,6 +960,9 @@ ifneq ($(XTENSA), 0)
 	@$(MD5SUM) test.bin
 	$(TINYGO) build -size short -o test.bin -target mch2022             examples/machinetest
 	@$(MD5SUM) test.bin
+	# xiao-esp32c6
+	$(TINYGO) build -size short -o test.bin -target=xiao-esp32c6      	examples/blinky1
+	@$(MD5SUM) test.bin
 	# xiao-esp32s3
 	$(TINYGO) build -size short -o test.bin -target=xiao-esp32s3   		examples/blinky1
 	@$(MD5SUM) test.bin

builder/build.go

@@ -1076,7 +1076,7 @@ func Build(pkgName, outpath, tmpdir string, config *compileopts.Config) (BuildRe
 		if err != nil {
 			return result, err
 		}
-	case "esp32", "esp32-img", "esp32c3", "esp32s3", "esp8266":
+	case "esp32", "esp32-img", "esp32c3", "esp32s3", "esp32c6", "esp8266":
 		// Special format for the ESP family of chips (parsed by the ROM
 		// bootloader).
 		result.Binary = filepath.Join(tmpdir, "main"+outext)

builder/builder_test.go

@@ -28,6 +28,7 @@ func TestClangAttributes(t *testing.T) {
 		"cortex-m4",
 		"cortex-m7",
 		"esp32c3",
+		"esp32c6",
 		"esp32s3",
 		"fe310",
 		"gameboy-advance",

builder/esp.go

@@ -100,12 +100,24 @@ func makeESPFirmwareImage(infile, outfile, format string) error {
 	chip_id := map[string]uint16{
 		"esp32":   0x0000,
 		"esp32c3": 0x0005,
+		"esp32c6": 0x000d,
 		"esp32s3": 0x0009,
 	}[chip]
 
+	// SPI flash speed/size byte (byte 3 of header):
+	//   Upper nibble = flash size, lower nibble = flash frequency.
+	//   The espflasher auto-detects and patches the flash size (upper nibble),
+	//   but the frequency (lower nibble) must be correct per chip.
+	spiSpeedSize := map[string]uint8{
+		"esp32":   0x1f, // 80MHz=0x0F, 2MB=0x10
+		"esp32c3": 0x1f, // 80MHz=0x0F, 2MB=0x10
+		"esp32c6": 0x10, // 80MHz=0x00, 2MB=0x10 (C6 uses different freq encoding)
+		"esp32s3": 0x1f, // 80MHz=0x0F, 2MB=0x10
+	}[chip]
+
 	// Image header.
 	switch chip {
-	case "esp32", "esp32c3", "esp32s3":
+	case "esp32", "esp32c3", "esp32s3", "esp32c6":
 		// Header format:
 		// https://github.com/espressif/esp-idf/blob/v4.3/components/bootloader_support/include/esp_app_format.h#L71
 		// Note: not adding a SHA256 hash as the binary is modified by
@@ -126,8 +138,8 @@ func makeESPFirmwareImage(infile, outfile, format string) error {
 		}{
 			magic:          0xE9,
 			segment_count:  byte(len(segments)),
-			spi_mode:       2,    // ESP_IMAGE_SPI_MODE_DIO
-			spi_speed_size: 0x1f, // ESP_IMAGE_SPI_SPEED_80M, ESP_IMAGE_FLASH_SIZE_2MB
+			spi_mode:       2, // ESP_IMAGE_SPI_MODE_DIO
+			spi_speed_size: spiSpeedSize,
 			entry_addr:     uint32(inf.Entry),
 			wp_pin:         0xEE, // disable WP pin
 			chip_id:        chip_id,

src/device/esp/esp32c6.S

@@ -0,0 +1,66 @@
+// This is a very minimal bootloader for the ESP32-C6. It only initializes the
+// flash and then continues with the generic RISC-V initialization code, which
+// in turn will call runtime.main.
+// It is written in assembly (and not in a higher level language) to make sure
+// it is entirely loaded into IRAM and doesn't accidentally call functions
+// stored in IROM.
+//
+// The ESP32-C6 has a unified IRAM/DRAM address space at 0x40800000, and
+// separate DROM (0x42800000) / IROM (0x42000000) flash-mapped regions.
+
+.section .init
+.global call_start_cpu0
+.type call_start_cpu0,@function
+call_start_cpu0:
+    // At this point:
+    // - The ROM bootloader is finished and has jumped to here.
+    // - We're running from IRAM: both IRAM and DRAM segments have been loaded
+    //   by the ROM bootloader.
+    // - We have a usable stack (but not the one we would like to use).
+    // - No flash mappings (MMU) are set up yet.
+
+    // Reset MMU, see bootloader_reset_mmu in the ESP-IDF.
+    call Cache_Suspend_ICache
+    mv s0, a0 // autoload value
+    call Cache_Invalidate_ICache_All
+    call Cache_MMU_Init
+
+    // Set up flash mapping (both IROM and DROM).
+    // On ESP32-C6, Cache_Dbus_MMU_Set is replaced by Cache_MSPI_MMU_Set
+    // which has an extra "sensitive" parameter.
+    // C equivalent:
+    //   Cache_MSPI_MMU_Set(0, 0, 0x42000000, 0, 64, 256, 0)
+    // Maps 16MB starting at 0x42000000, covering both IROM and DROM.
+    li a0, 0              // sensitive: no flash encryption
+    li a1, 0              // ext_ram: MMU_ACCESS_FLASH
+    li a2, 0x42000000     // vaddr: start of flash-mapped region
+    li a3, 0              // paddr: physical address in the flash chip
+    li a4, 64             // psize: always 64 (kilobytes)
+    li a5, 256            // num: pages (16MB / 64K = 256, covers IROM+DROM)
+    li a6, 0              // fixed
+    call Cache_MSPI_MMU_Set
+
+    // Enable the flash cache.
+    mv a0, s0 // restore autoload value from Cache_Suspend_ICache call
+    call Cache_Resume_ICache
+
+    // Jump to generic RISC-V initialization, which initializes the stack
+    // pointer and globals register. It should not return.
+    j _start
+
+.section .text.exception_vectors
+.global _vector_table
+.type _vector_table,@function
+
+_vector_table:
+
+    .option push
+    .option norvc
+
+    .rept 32
+    j handleInterruptASM            /* interrupt handler */
+    .endr
+
+    .option pop
+
+.size _vector_table, .-_vector_table

src/machine/board_xiao-esp32c6.go

@@ -0,0 +1,57 @@
+//go:build xiao_esp32c6
+
+// This file contains the pin mappings for the Seeed XIAO ESP32C6 board.
+//
+// Seeed Studio XIAO ESP32C6 is an IoT mini development board based on
+// the Espressif ESP32-C6 WiFi 6 / Bluetooth 5 / 802.15.4 chip.
+//
+// - https://www.seeedstudio.com/Seeed-Studio-XIAO-ESP32C6-p-5884.html
+// - https://wiki.seeedstudio.com/xiao_esp32c6_getting_started/
+
+package machine
+
+// Digital Pins
+const (
+	D0  = GPIO0
+	D1  = GPIO1
+	D2  = GPIO2
+	D3  = GPIO21
+	D4  = GPIO22
+	D5  = GPIO23
+	D6  = GPIO16
+	D7  = GPIO17
+	D8  = GPIO19
+	D9  = GPIO20
+	D10 = GPIO18
+)
+
+// Analog pins
+const (
+	A0 = GPIO0
+	A1 = GPIO1
+	A2 = GPIO2
+)
+
+// UART pins
+const (
+	UART_TX_PIN = GPIO16
+	UART_RX_PIN = GPIO17
+)
+
+// I2C pins
+const (
+	SDA_PIN = GPIO22
+	SCL_PIN = GPIO23
+)
+
+// SPI pins
+const (
+	SPI_SCK_PIN = GPIO19
+	SPI_SDI_PIN = GPIO20
+	SPI_SDO_PIN = GPIO18
+)
+
+// Onboard LEDs
+const (
+	LED = GPIO15
+)