Fix error detection of Cadence HAL.

	* verilog-mode.el (verilog-error-font-lock-keywords,
	verilog-error-regexp-emacs-alist,
	verilog-error-regexp-xemacs-alist): Fix error detection of Cadence
	HAL, reported by David Asher.  Repair drift between the three
	similar error variables.


git-svn-id: file:///verilog-mode-svn/trunk@606 db5bb42b-8904-0410-88e9-aa7026cf2ec3

Author: wsnyder

Makefile

@@ -59,22 +59,8 @@ $(eval $(call test_xemacs_sub,test_xemacs_5,5of5))
 test_errors:
 	@echo
 	@echo == test_errors
-	@echo emit a bunch of error messages that Emacs should
-	@echo "recognize if you type C-x \` and take you to the correct line of error_file.v"
-	@echo "Warning: code located there (error_file.v line 9) is dangerous"
-	@echo "(W1800) error_file.v 21: Problems"
-	@echo "f*E,1364 (error_file.v,2) Issues"
-	@echo "Error: code located here (error_file.v line 8) is fatal"
-	@echo "ERROR  : error_file.v, line 1: erroneous"
-	@echo "INFO  : error_file.v, line 7: informational"
-	@echo "WARNING : error_file.v, line 6: curious"
-	@echo "In file error_file.v line 5:"
-	@echo "a"
-	@echo "b"
-	@echo "Failure was obsevred"
-	@echo la di da
-	@echo syntax error: problems
-	@echo error_file.v 7: here is where they are
+	-# The multiline errors must be in one read()s output or the comint may not match it
+	-cat error_msgs.out
 
 test_batch: e/verilog-mode.elc
 	@echo == test_batch

error_file.v

@@ -39,7 +39,6 @@
 39;
 40;
 
-  
-  
-   
-   
+// Local Variables:
+// compile-command: "make test_errors "
+// End:

error_msgs.out

@@ -0,0 +1,30 @@
+A bunch of error messages that Emacs should
+recognize if you type C-x ` and take you to the correct line of error_file.v
+Note the 'gnu' compilation-error-regexp-alist in messes some up - to be fixed.
+(setq compilation-error-regexp-alist (delete 'gnu compilation-error-regexp-alist))
+
+Warning: code located there (error_file.v line 9) is dangerous
+(W1800) error_file.v 21: Problems
+f*E,1364 (error_file.v,2) Issues
+Error: code located here (error_file.v line 8) is fatal
+ERROR  : error_file.v, line 1: erroneous
+INFO  : error_file.v, line 7: informational
+WARNING : error_file.v, line 6: curious
+nctool: *E,UNDIDN (error_file.v,11|22): 'zz': the message [12.5(IEEE)].
+nctool: *W,TRUNCZ (error_file.v,14|0): a W message.
+nctool: *W,URDREG[CN_ABSTR] (error_file.v,15|0): another W message in 'foo'.
+Verilog-Perl: %Error: error_file.v:16: Some message from Verilog-Perl etc.
+Verilog-Perl: %Warning: ./error_file.v:17: Some message from Verilog-Perl etc.
+%Warning: ./error_file.v:17: Some message from Verilator etc.
+# This must be in one echo, or the comint may not match it
+In file error_file.v line 5:
+a
+b
+Failure was obsevred
+la di da
+syntax error: problems
+error_file.v 7: here is where they are
+
+// Local Variables:
+// compile-command: "make test_errors "
+// End:

verilog-mode.el

@@ -644,17 +644,15 @@ always be saved."
 ;;; Compile support
 (require 'compile)
 (defvar verilog-error-regexp-added nil)
-; List of regexps for Verilog compilers, like verilint. See compilation-error-regexp-alist
-;   for the formatting.
-; Here is the version for Emacs 22:
+
 (defvar verilog-error-regexp-emacs-alist
   '(
     (verilog-xl-1
      "\\(Error\\|Warning\\)!.*\n?.*\"\\([^\"]+\\)\", \\([0-9]+\\)" 2 3)
     (verilog-xl-2
      "([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\(line[ \t]+\\)?\\([0-9]+\\):.*$" 1 3)
     (verilog-IES
-     ".*\\*[WE],[0-9A-Z]+ (\\([^ \t,]+\\),\\([0-9]+\\)" 1 2)
+     ".*\\*[WE],[0-9A-Z]+\\(\[[0-9A-Z_,]+\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)" 2 3)
     (verilog-surefire-1
      "[^\n]*\\[\\([^:]+\\):\\([0-9]+\\)\\]" 1 2)
     (verilog-surefire-2
@@ -676,87 +674,64 @@ always be saved."
     (verilog-verilator
      "%?\\(Error\\|Warning\\)\\(-[^:]+\\|\\):[\n ]*\\([^ \t:]+\\):\\([0-9]+\\):" 3 4)
     (verilog-leda
-     "In file \\([^ \t]+\\)[ \t]+line[ \t]+\\([0-9]+\\):
-.*
-.*
-.*
-\\(Warning\\|Error\\|Failure\\)" 1 2)
-    ))
-;; And the version for XEmacs:
-(defvar verilog-error-regexp-xemacs-alist
-  '(verilog
-    ("[^\n]*\\[\\([^:]+\\):\\([0-9]+\\)\\]" 1 2)
-    ("\\(WARNING\\|ERROR\\|INFO\\)[^:]*: \\([^,]+\\),\\s-+\\(line \\)?\\([0-9]+\\):" 2 4 )
-    ("\
-\\([a-zA-Z]?:?[^:( \t\n]+\\)[:(][ \t]*\\([0-9]+\\)\\([) \t]\\|\
-:\\([^0-9\n]\\|\\([0-9]+:\\)\\)\\)" 1 2 5)
-; xsim
-; Error! in file /homes/mac/Axis/Xsim/test.v at line 13		[OBJ_NOT_DECLARED]
-    ("\\(Error\\|Warning\\).*in file (\\([^ \t]+\\) at line *\\([0-9]+\\))" 2 3)
-; vcs
-    ("\\(Error\\|Warning\\):[^(]*(\\([^ \t]+\\) line *\\([0-9]+\\))" 2 3)
-    ("Warning:.*(port.*(\\([^ \t]+\\) line \\([0-9]+\\))" 1 2)
-    ("\\(Error\\|Warning\\):[\n.]*\\([^ \t]+\\) *\\([0-9]+\\):" 2 3)
-    ("syntax error:.*\n\\([^ \t]+\\) *\\([0-9]+\\):" 1 2)
-; Verilator
-    ("%?\\(Error\\|Warning\\)\\(-[^:]+\\|\\):[\n ]*\\([^ \t:]+\\):\\([0-9]+\\):" 3 4)
-; verilog-xl
-    ("\\(Error\\|Warning\\)!.*\n?.*\"\\([^\"]+\\)\", \\([0-9]+\\)" 2 3)
-    ("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\([0-9]+\\):.*$" 1 2)	       ; vxl
-    ("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+line[ \t]+\\([0-9]+\\):.*$" 1 2)
-; nc-verilog
-    (".*\\*[WE],[0-9A-Z]+ (\\([^ \t,]+\\),\\([0-9]+\\)|" 1 2)
-; Leda
-    ("In file \\([^ \t]+\\)[ \t]+line[ \t]+\\([0-9]+\\):\n[^\n]*\n[^\n]*\n\\[\\(Warning\\|Error\\|Failure\\)\\][^\n]*" 1 2)
+     "^In file \\([^ \t]+\\)[ \t]+line[ \t]+\\([0-9]+\\):\n[^\n]*\n[^\n]*\n\\(Warning\\|Error\\|Failure\\)[^\n]*" 1 2)
     )
-  )
+  "List of regexps for Verilog compilers.
+See `compilation-error-regexp-alist' for the formatting.  For Emacs 22+.")
+
+(defvar verilog-error-regexp-xemacs-alist
+  ;; Emacs form is '((v-tool "re" 1 2) ...)
+  ;; XEmacs form is '(verilog ("re" 1 2) ...)
+  ;; So we can just map from Emacs to Xemacs
+  (list 'verilog (mapcar 'cdr verilog-error-regexp-emacs-alist))
+  "List of regexps for Verilog compilers.
+See `compilation-error-regexp-alist' for the formatting.  For XEmacs.")
 
 (defvar verilog-error-font-lock-keywords
   '(
+    ;; verilog-xl-1
+    ("\\(Error\\|Warning\\)!.*\n?.*\"\\([^\"]+\\)\", \\([0-9]+\\)" 2 bold t)
+    ("\\(Error\\|Warning\\)!.*\n?.*\"\\([^\"]+\\)\", \\([0-9]+\\)" 2 bold t)
+    ;; verilog-xl-2
+    ("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\(line[ \t]+\\)?\\([0-9]+\\):.*$" 1 bold t)
+    ("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\(line[ \t]+\\)?\\([0-9]+\\):.*$" 3 bold t)
+    ;; verilog-IES (nc-verilog)
+    (".*\\*[WE],[0-9A-Z]+\\(\[[0-9A-Z_,]+\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)|" 2 bold t)
+    (".*\\*[WE],[0-9A-Z]+\\(\[[0-9A-Z_,]+\]\\)? (\\([^ \t,]+\\),\\([0-9]+\\)|" 3 bold t)
+    ;; verilog-surefire-1
     ("[^\n]*\\[\\([^:]+\\):\\([0-9]+\\)\\]" 1 bold t)
     ("[^\n]*\\[\\([^:]+\\):\\([0-9]+\\)\\]" 2 bold t)
-
+    ;; verilog-surefire-2
     ("\\(WARNING\\|ERROR\\|INFO\\): \\([^,]+\\), line \\([0-9]+\\):" 2 bold t)
     ("\\(WARNING\\|ERROR\\|INFO\\): \\([^,]+\\), line \\([0-9]+\\):" 3 bold t)
-
+    ;; verilog-verbose
     ("\
 \\([a-zA-Z]?:?[^:( \t\n]+\\)[:(][ \t]*\\([0-9]+\\)\\([) \t]\\|\
 :\\([^0-9\n]\\|\\([0-9]+:\\)\\)\\)" 1 bold t)
     ("\
 \\([a-zA-Z]?:?[^:( \t\n]+\\)[:(][ \t]*\\([0-9]+\\)\\([) \t]\\|\
 :\\([^0-9\n]\\|\\([0-9]+:\\)\\)\\)" 1 bold t)
-
+    ;; verilog-vcs-1
     ("\\(Error\\|Warning\\):[^(]*(\\([^ \t]+\\) line *\\([0-9]+\\))" 2 bold t)
     ("\\(Error\\|Warning\\):[^(]*(\\([^ \t]+\\) line *\\([0-9]+\\))" 3 bold t)
-
-    ("%?\\(Error\\|Warning\\)\\(-[^:]+\\|\\):[\n ]*\\([^ \t:]+\\):\\([0-9]+\\):" 3 bold t)
-    ("%?\\(Error\\|Warning\\)\\(-[^:]+\\|\\):[\n ]*\\([^ \t:]+\\):\\([0-9]+\\):" 4 bold t)
-
+    ;; verilog-vcs-2
     ("Warning:.*(port.*(\\([^ \t]+\\) line \\([0-9]+\\))" 1 bold t)
     ("Warning:.*(port.*(\\([^ \t]+\\) line \\([0-9]+\\))" 1 bold t)
-
+    ;; verilog-vcs-3
     ("\\(Error\\|Warning\\):[\n.]*\\([^ \t]+\\) *\\([0-9]+\\):" 2 bold t)
     ("\\(Error\\|Warning\\):[\n.]*\\([^ \t]+\\) *\\([0-9]+\\):" 3 bold t)
-
+    ;; verilog-vcs-4
     ("syntax error:.*\n\\([^ \t]+\\) *\\([0-9]+\\):" 1 bold t)
     ("syntax error:.*\n\\([^ \t]+\\) *\\([0-9]+\\):" 2 bold t)
-       ; vxl
-    ("\\(Error\\|Warning\\)!.*\n?.*\"\\([^\"]+\\)\", \\([0-9]+\\)" 2 bold t)
-    ("\\(Error\\|Warning\\)!.*\n?.*\"\\([^\"]+\\)\", \\([0-9]+\\)" 2 bold t)
-
-    ("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\([0-9]+\\):.*$" 1 bold t)
-    ("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+\\([0-9]+\\):.*$" 2 bold t)
-
-    ("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+line[ \t]+\\([0-9]+\\):.*$" 1 bold t)
-    ("([WE][0-9A-Z]+)[ \t]+\\([^ \t\n,]+\\)[, \t]+line[ \t]+\\([0-9]+\\):.*$" 2 bold t)
-        ; nc-verilog
-    (".*[WE],[0-9A-Z]+ (\\([^ \t,]+\\),\\([0-9]+\\)|" 1 bold t)
-    (".*[WE],[0-9A-Z]+ (\\([^ \t,]+\\),\\([0-9]+\\)|" 2 bold t)
-       ; Leda
-    ("In file \\([^ \t]+\\)[ \t]+line[ \t]+\\([0-9]+\\):\n[^\n]*\n[^\n]*\n\\[\\(Warning\\|Error\\|Failure\\)\\][^\n]*" 1 bold t)
-    ("In file \\([^ \t]+\\)[ \t]+line[ \t]+\\([0-9]+\\):\n[^\n]*\n[^\n]*\n\\[\\(Warning\\|Error\\|Failure\\)\\][^\n]*" 2 bold t)
+    ;; verilog-verilator
+    (".*%?\\(Error\\|Warning\\)\\(-[^:]+\\|\\):[\n ]*\\([^ \t:]+\\):\\([0-9]+\\):" 3 bold t)
+    (".*%?\\(Error\\|Warning\\)\\(-[^:]+\\|\\):[\n ]*\\([^ \t:]+\\):\\([0-9]+\\):" 4 bold t)
+    ;; verilog-leda
+    ("^In file \\([^ \t]+\\)[ \t]+line[ \t]+\\([0-9]+\\):\n[^\n]*\n[^\n]*\n\\(Warning\\|Error\\|Failure\\)[^\n]*" 1 bold t)
+    ("^In file \\([^ \t]+\\)[ \t]+line[ \t]+\\([0-9]+\\):\n[^\n]*\n[^\n]*\n\\(Warning\\|Error\\|Failure\\)[^\n]*" 2 bold t)
     )
-  "*Keywords to also highlight in Verilog *compilation* buffers.")
+  "*Keywords to also highlight in Verilog *compilation* buffers.
+Only used in XEmacs; GNU Emacs uses `verilog-error-regexp-emacs-alist'.")
 
 (defcustom verilog-library-flags '("")
   "*List of standard Verilog arguments to use for /*AUTOINST*/.