@@ -29,8 +29,12 @@ export PT_HPU_LAZY_MODE=1
2929NIXL_BUFFER_DEVICE=${NIXL_BUFFER_DEVICE:- " cpu" }
3030VLLM_NIXL_BACKEND=${VLLM_NIXL_BACKEND:- " UCX" }
3131
32+ UCX_TLS=" tcp"
3233if [ " $VLLM_NIXL_BACKEND " == " UCX" ]; then
3334 export VLLM_NIXL_DEVICE_TO_DEVICE=false
35+ if [ " $NIXL_BUFFER_DEVICE " == " hpu" ]; then
36+ UCX_TLS=" gaudi_gdr,ib,rc,ud"
37+ fi
3438else
3539 export VLLM_NIXL_DEVICE_TO_DEVICE=true
3640fi
@@ -42,8 +46,7 @@ PREFILLER_TP_SIZE=${PREFILLER_TP_SIZE:-1}
4246DECODER_TP_SIZE=${DECODER_TP_SIZE:- 2}
4347
4448# Find the git repository root directory
45- # GIT_ROOT=$(git rev-parse --show-toplevel)
46- GIT_ROOT=" /home/vllm-nixl/vllm"
49+ GIT_ROOT=$( git rev-parse --show-toplevel)
4750
4851# SMI_BIN=$(which nvidia-smi || which rocm-smi)
4952
@@ -116,7 +119,7 @@ run_tests_for_model() {
116119 echo " Starting prefill instance $i on GPU $GPU_ID , port $PORT "
117120
118121 # Build the command with or without model-specific args
119- BASE_CMD=" RANK=0 UCX_TLS=tcp VLLM_NIXL_SIDE_CHANNEL_PORT=$SIDE_CHANNEL_PORT vllm serve $model_name \
122+ BASE_CMD=" RANK=0 UCX_TLS=$UCX_TLS VLLM_NIXL_SIDE_CHANNEL_PORT=$SIDE_CHANNEL_PORT vllm serve $model_name \
120123 --port $PORT \
121124 --enforce-eager \
122125 --max_num_batched_tokens 8192 \
@@ -149,7 +152,7 @@ run_tests_for_model() {
149152 echo " Starting decode instance $i on GPU $GPU_ID , port $PORT "
150153
151154 # Build the command with or without model-specific args
152- BASE_CMD=" RANK=1 UCX_TLS=tcp VLLM_NIXL_SIDE_CHANNEL_PORT=$SIDE_CHANNEL_PORT vllm serve $model_name \
155+ BASE_CMD=" RANK=1 UCX_TLS=$UCX_TLS VLLM_NIXL_SIDE_CHANNEL_PORT=$SIDE_CHANNEL_PORT vllm serve $model_name \
153156 --port $PORT \
154157 --enforce-eager \
155158 --max_num_batched_tokens 8192 \
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