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yjlcoderyjlcoder
committed
ALL Complete: CPU, VGA, SEG
1 parent f6df580 commit 7a926e7

18 files changed

+1351
-624
lines changed

‎ASM/imem.coe

+343-52
Large diffs are not rendered by default.

‎ASM/myprogram.asm

+49
Original file line numberDiff line numberDiff line change
@@ -315,6 +315,55 @@ mul $7, $7, $6
315315
beq $7, 1, Win1
316316
beq $7, 8, Win2
317317

318+
ori $5, $0, 0
319+
lb $6, 0x103($5)
320+
nop
321+
nop
322+
beq $6, 0, RET_isComplete
323+
ori $5, $0, 1
324+
lb $6, 0x103($5)
325+
nop
326+
nop
327+
beq $6, 0, RET_isComplete
328+
ori $5, $0, 2
329+
lb $6, 0x103($5)
330+
nop
331+
nop
332+
beq $6, 0, RET_isComplete
333+
ori $5, $0, 3
334+
lb $6, 0x103($5)
335+
nop
336+
nop
337+
beq $6, 0, RET_isComplete
338+
ori $5, $0, 4
339+
lb $6, 0x103($5)
340+
nop
341+
nop
342+
beq $6, 0, RET_isComplete
343+
ori $5, $0, 5
344+
lb $6, 0x103($5)
345+
nop
346+
nop
347+
beq $6, 0, RET_isComplete
348+
ori $5, $0, 6
349+
lb $6, 0x103($5)
350+
nop
351+
nop
352+
beq $6, 0, RET_isComplete
353+
ori $5, $0, 7
354+
lb $6, 0x103($5)
355+
nop
356+
nop
357+
beq $6, 0, RET_isComplete
358+
ori $5, $0, 8
359+
lb $6, 0x103($5)
360+
nop
361+
nop
362+
beq $6, 0, RET_isComplete
363+
364+
beq $0, $0, LOOP_END_FOR_1
365+
366+
RET_isComplete:
318367
lw $7, ($sp)
319368
subi $sp, $sp, 4
320369
lw $6, ($sp)

‎MipsCPU.xise

+12-8
Original file line numberDiff line numberDiff line change
@@ -17,19 +17,19 @@
1717
<files>
1818
<file xil_pn:name="ipcore_dir/clk_ip.xco" xil_pn:type="FILE_COREGEN">
1919
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="16"/>
20-
<association xil_pn:name="Implementation" xil_pn:seqID="16"/>
20+
<association xil_pn:name="Implementation" xil_pn:seqID="17"/>
2121
</file>
2222
<file xil_pn:name="ipcore_dir/instMem_ip.xco" xil_pn:type="FILE_COREGEN">
2323
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="15"/>
24-
<association xil_pn:name="Implementation" xil_pn:seqID="15"/>
24+
<association xil_pn:name="Implementation" xil_pn:seqID="16"/>
2525
</file>
2626
<file xil_pn:name="control.v" xil_pn:type="FILE_VERILOG">
2727
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="11"/>
2828
<association xil_pn:name="Implementation" xil_pn:seqID="11"/>
2929
</file>
3030
<file xil_pn:name="cpu.v" xil_pn:type="FILE_VERILOG">
3131
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="18"/>
32-
<association xil_pn:name="Implementation" xil_pn:seqID="18"/>
32+
<association xil_pn:name="Implementation" xil_pn:seqID="19"/>
3333
</file>
3434
<file xil_pn:name="execute.v" xil_pn:type="FILE_VERILOG">
3535
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="10"/>
@@ -69,15 +69,15 @@
6969
</file>
7070
<file xil_pn:name="mips.v" xil_pn:type="FILE_VERILOG">
7171
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="14"/>
72-
<association xil_pn:name="Implementation" xil_pn:seqID="14"/>
72+
<association xil_pn:name="Implementation" xil_pn:seqID="15"/>
7373
</file>
7474
<file xil_pn:name="pc_module.v" xil_pn:type="FILE_VERILOG">
7575
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
7676
<association xil_pn:name="Implementation" xil_pn:seqID="2"/>
7777
</file>
7878
<file xil_pn:name="ram.v" xil_pn:type="FILE_VERILOG">
7979
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="13"/>
80-
<association xil_pn:name="Implementation" xil_pn:seqID="13"/>
80+
<association xil_pn:name="Implementation" xil_pn:seqID="14"/>
8181
</file>
8282
<file xil_pn:name="regfile.v" xil_pn:type="FILE_VERILOG">
8383
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
@@ -95,11 +95,15 @@
9595
</file>
9696
<file xil_pn:name="btn.v" xil_pn:type="FILE_VERILOG">
9797
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="17"/>
98-
<association xil_pn:name="Implementation" xil_pn:seqID="17"/>
98+
<association xil_pn:name="Implementation" xil_pn:seqID="18"/>
9999
</file>
100100
<file xil_pn:name="vga.ucf" xil_pn:type="FILE_UCF">
101101
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
102102
</file>
103+
<file xil_pn:name="segdisplay.v" xil_pn:type="FILE_VERILOG">
104+
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="88"/>
105+
<association xil_pn:name="Implementation" xil_pn:seqID="13"/>
106+
</file>
103107
<file xil_pn:name="ipcore_dir/clk_ip.xise" xil_pn:type="FILE_COREGENISE">
104108
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
105109
</file>
@@ -349,8 +353,8 @@
349353
<property xil_pn:name="Run Design Rules Checker (DRC)" xil_pn:value="true" xil_pn:valueState="default"/>
350354
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
351355
<property xil_pn:name="Security" xil_pn:value="Enable Readback and Reconfiguration" xil_pn:valueState="default"/>
352-
<property xil_pn:name="Selected Module Instance Name" xil_pn:value="/cpu_tb" xil_pn:valueState="non-default"/>
353-
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="work.cpu_tb" xil_pn:valueState="non-default"/>
356+
<property xil_pn:name="Selected Module Instance Name" xil_pn:value="/cpu_tb/uut/instMem" xil_pn:valueState="non-default"/>
357+
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="work.instMem_ip" xil_pn:valueState="non-default"/>
354358
<property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="work.cpu_tb" xil_pn:valueState="non-default"/>
355359
<property xil_pn:name="Selected Simulation Source Node" xil_pn:value="uut" xil_pn:valueState="non-default"/>
356360
<property xil_pn:name="Set SPI Configuration Bus Width spartan6" xil_pn:value="1" xil_pn:valueState="default"/>

‎cpu.v

+13-1
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,11 @@ module cpu(
2727
output [2:0] red_out,
2828
output [2:0] green_out,
2929
output Hsync_out,
30-
output Vsync_out
30+
output Vsync_out,
31+
32+
output [6:0] seg,
33+
output [3:0] an,
34+
output dp
3135
);
3236

3337
wire[31:0] instAddr;
@@ -118,5 +122,13 @@ module cpu(
118122
.btn(btn),
119123
.wdata(btn_wdata)
120124
);
125+
126+
segtop seg0(
127+
.clk50(clk0),
128+
.rst(rst),
129+
.seg(seg),
130+
.an(an),
131+
.dp(dp)
132+
);
121133
endmodule
122134

‎cpu_tb.v

+23-10
Original file line numberDiff line numberDiff line change
@@ -65,39 +65,52 @@ module cpu_tb;
6565
#1000 btn = 0;
6666

6767
#300000 btn = 1;
68-
6968
#1000 btn = 0;
7069

7170
#100000 btn = 16;
72-
7371
#1000 btn = 0;
74-
7572
#100000 btn = 1;
73+
#1000 btn = 0;
7674

75+
#100000 btn = 16;
76+
#1000 btn = 0;
77+
#100000 btn = 1;
7778
#1000 btn = 0;
7879

7980
#100000 btn = 8;
80-
8181
#1000 btn = 0;
82-
8382
#100000 btn = 1;
84-
8583
#1000 btn = 0;
8684

87-
#100000 btn = 16;
88-
85+
#100000 btn = 4;
8986
#1000 btn = 0;
90-
9187
#100000 btn = 1;
92-
9388
#1000 btn = 0;
9489

90+
#100000 btn = 4;
91+
#1000 btn = 0;
9592
#100000 btn = 8;
93+
#1000 btn = 0;
94+
#100000 btn = 1;
95+
#1000 btn = 0;
9696

97+
#100000 btn = 2;
98+
#1000 btn = 0;
99+
#100000 btn = 1;
97100
#1000 btn = 0;
98101

102+
#100000 btn = 16;
103+
#1000 btn = 0;
104+
#100000 btn = 16;
105+
#1000 btn = 0;
106+
#100000 btn = 8;
107+
#1000 btn = 0;
99108
#100000 btn = 1;
109+
#1000 btn = 0;
100110

111+
#100000 btn = 4;
112+
#1000 btn = 0;
113+
#100000 btn = 1;
101114
#1000 btn = 0;
102115

103116
#100000 $stop;

‎instMem_ip.mif

+74-19
Original file line numberDiff line numberDiff line change
@@ -420,9 +420,9 @@
420420
00000000000000000000000000000000
421421
01110000111001100011100000000010
422422
00100000000000010000000000000001
423-
00010000001001110000000010011011
423+
00010000001001110000000011010010
424424
00100000000000010000000000001000
425-
00010000001001110000000010011011
425+
00010000001001110000000011010010
426426
00110100000001110000000000000001
427427
00110100000001010000000000000011
428428
10000000101001100000000100000011
@@ -440,9 +440,9 @@
440440
00000000000000000000000000000000
441441
01110000111001100011100000000010
442442
00100000000000010000000000000001
443-
00010000001001110000000010000111
443+
00010000001001110000000010111110
444444
00100000000000010000000000001000
445-
00010000001001110000000010000111
445+
00010000001001110000000010111110
446446
00110100000001110000000000000001
447447
00110100000001010000000000000110
448448
10000000101001100000000100000011
@@ -460,9 +460,9 @@
460460
00000000000000000000000000000000
461461
01110000111001100011100000000010
462462
00100000000000010000000000000001
463-
00010000001001110000000001110011
463+
00010000001001110000000010101010
464464
00100000000000010000000000001000
465-
00010000001001110000000001110011
465+
00010000001001110000000010101010
466466
00110100000001110000000000000001
467467
00110100000001010000000000000000
468468
10000000101001100000000100000011
@@ -480,9 +480,9 @@
480480
00000000000000000000000000000000
481481
01110000111001100011100000000010
482482
00100000000000010000000000000001
483-
00010000001001110000000001011111
483+
00010000001001110000000010010110
484484
00100000000000010000000000001000
485-
00010000001001110000000001011111
485+
00010000001001110000000010010110
486486
00110100000001110000000000000001
487487
00110100000001010000000000000001
488488
10000000101001100000000100000011
@@ -500,9 +500,9 @@
500500
00000000000000000000000000000000
501501
01110000111001100011100000000010
502502
00100000000000010000000000000001
503-
00010000001001110000000001001011
503+
00010000001001110000000010000010
504504
00100000000000010000000000001000
505-
00010000001001110000000001001011
505+
00010000001001110000000010000010
506506
00110100000001110000000000000001
507507
00110100000001010000000000000011
508508
10000000101001100000000100000011
@@ -520,9 +520,9 @@
520520
00000000000000000000000000000000
521521
01110000111001100011100000000010
522522
00100000000000010000000000000001
523-
00010000001001110000000000110111
523+
00010000001001110000000001101110
524524
00100000000000010000000000001000
525-
00010000001001110000000000110111
525+
00010000001001110000000001101110
526526
00110100000001110000000000000001
527527
00110100000001010000000000000000
528528
10000000101001100000000100000011
@@ -540,9 +540,9 @@
540540
00000000000000000000000000000000
541541
01110000111001100011100000000010
542542
00100000000000010000000000000001
543-
00010000001001110000000000100011
543+
00010000001001110000000001011010
544544
00100000000000010000000000001000
545-
00010000001001110000000000100011
545+
00010000001001110000000001011010
546546
00110100000001110000000000000001
547547
00110100000001010000000000000010
548548
10000000101001100000000100000011
@@ -560,9 +560,64 @@
560560
00000000000000000000000000000000
561561
01110000111001100011100000000010
562562
00100000000000010000000000000001
563-
00010000001001110000000000001111
563+
00010000001001110000000001000110
564564
00100000000000010000000000001000
565-
00010000001001110000000000001111
565+
00010000001001110000000001000110
566+
00110100101001010000000000000000
567+
10000000101001100000000100000011
568+
00000000000000000000000000000000
569+
00000000000000000000000000000000
570+
00100000000000010000000000000000
571+
00010000001001100000000000110001
572+
00110100101001010000000000000001
573+
10000000101001100000000100000011
574+
00000000000000000000000000000000
575+
00000000000000000000000000000000
576+
00100000000000010000000000000000
577+
00010000001001100000000000101011
578+
00110100101001010000000000000010
579+
10000000101001100000000100000011
580+
00000000000000000000000000000000
581+
00000000000000000000000000000000
582+
00100000000000010000000000000000
583+
00010000001001100000000000100101
584+
00110100101001010000000000000011
585+
10000000101001100000000100000011
586+
00000000000000000000000000000000
587+
00000000000000000000000000000000
588+
00100000000000010000000000000000
589+
00010000001001100000000000011111
590+
00110100101001010000000000000100
591+
10000000101001100000000100000011
592+
00000000000000000000000000000000
593+
00000000000000000000000000000000
594+
00100000000000010000000000000000
595+
00010000001001100000000000011001
596+
00110100101001010000000000000101
597+
10000000101001100000000100000011
598+
00000000000000000000000000000000
599+
00000000000000000000000000000000
600+
00100000000000010000000000000000
601+
00010000001001100000000000010011
602+
00110100101001010000000000000110
603+
10000000101001100000000100000011
604+
00000000000000000000000000000000
605+
00000000000000000000000000000000
606+
00100000000000010000000000000000
607+
00010000001001100000000000001101
608+
00110100101001010000000000000111
609+
10000000101001100000000100000011
610+
00000000000000000000000000000000
611+
00000000000000000000000000000000
612+
00100000000000010000000000000000
613+
00010000001001100000000000000111
614+
00110100101001010000000000001000
615+
10000000101001100000000100000011
616+
00000000000000000000000000000000
617+
00000000000000000000000000000000
618+
00100000000000010000000000000000
619+
00010000001001100000000000000001
620+
00010000000000000000000000101000
566621
10001111101001110000000000000000
567622
00100000000000010000000000000100
568623
00000011101000011110100000100010
@@ -578,13 +633,13 @@
578633
00000011111000000000000000001000
579634
00110100000001100000000000000001
580635
00010000000000000000000000000010
581-
00110100000001100000000000000001
636+
00110100000001100000000000000010
582637
00010000000000000000000000000000
583638
00100000000000010000000000000010
584639
00010000001001100000000000000010
585-
00110100000001010000000000111000
586-
00010000000000000000000000000001
587640
00110100000001010000000010110101
641+
00010000000000000000000000000001
642+
00110100000001010000000000111000
588643
00110100000001100000000000000000
589644
00001100000000000000000011100010
590645
00110100000001100000000000000001

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