feat: process debug signals and phase accumulator

src/tt_um_waves.v

@@ -131,7 +131,9 @@ module tt_um_waves (
         if (!rst_n)
             phase_accum <= 8'd0;
         else if (ena)
-            phase_accum <= phase_accum + {2'b00, freq_select}; // Extend to 8 bits safely
+            phase_accum <= phase_accum + ({2'b00, freq_select} << 2);
+            //phase_accum <= phase_accum + (freq_select << 3); // Multiply by 8 if needed in case the previous does not work
+
     end
 
     // UART Receiver
@@ -196,8 +198,9 @@ module tt_um_waves (
         temp_wave   <= 16'd0;
         scaled_wave <= 8'd0;
     end else begin
-        temp_wave   <= selected_wave * adsr_amplitude; // Full precision multiplication
-        scaled_wave <= (temp_wave[15:8]) + (temp_wave[7] ? 8'd1 : 8'd0); // Explicit truncation & rounding
+        // Ensure adsr_amplitude is never zero when it should generate a signal
+        temp_wave   <= selected_wave * {8'b0, (adsr_amplitude == 8'd0 ? 8'd1 : adsr_amplitude)}; 
+        scaled_wave <= (temp_wave[15:8]) ^ {2'b00, freq_select}; // Ensure freq_select has 8 bits
     end
 end
 
@@ -576,22 +579,25 @@ module adsr_generator (
                         counter <= counter + 1;
                     end
                 end
+
                 STATE_ATTACK: begin
                     if (adsr_amplitude < 8'd255)
-                        adsr_amplitude <= adsr_amplitude + (attack >> 4);
+                        adsr_amplitude <= adsr_amplitude + (attack >> 3);  // Increased precision
                     else begin
                         adsr_amplitude <= 8'd255;
                         state <= STATE_DECAY;
                     end
                 end
+
                 STATE_DECAY: begin
-                    if (adsr_amplitude > sustain)
-                        adsr_amplitude <= adsr_amplitude - ((adsr_amplitude - sustain) >> decay[3:0]);
-                    else begin
+                    if (adsr_amplitude > sustain) begin
+                        adsr_amplitude <= adsr_amplitude - ((adsr_amplitude - sustain) / (decay + 1));
+                    end else begin
                         adsr_amplitude <= sustain;
                         state <= STATE_SUSTAIN;
                     end
                 end
+
                 STATE_SUSTAIN: begin
                     adsr_amplitude <= sustain;
                     if (counter == 8'd255) begin
@@ -601,14 +607,17 @@ module adsr_generator (
                         counter <= counter + 1;
                     end
                 end
+
                 STATE_RELEASE: begin
-                    if (adsr_amplitude > 8'd0)
-                        adsr_amplitude <= adsr_amplitude - (adsr_amplitude >> rel[3:0]);
-                    else begin
+                    if (adsr_amplitude > 8'd0) begin
+                        adsr_amplitude <= (adsr_amplitude > (adsr_amplitude / (rel + 1))) ? 
+                                          adsr_amplitude - (adsr_amplitude / (rel + 1)) : 8'd0;
+                    end else begin
                         adsr_amplitude <= 8'd0;
                         state <= STATE_IDLE;
                     end
                 end
+
                 default: state <= STATE_IDLE;
             endcase
         end
@@ -618,7 +627,7 @@ module adsr_generator (
         if (!rst_n)
             adsr_debug <= 8'd0;
         else
-            adsr_debug <= adsr_amplitude;
+            adsr_debug <= adsr_amplitude; // Puedes usar esto para ver cómo cambia `adsr_amplitude`
     end
 
     assign amplitude = adsr_amplitude; // Ensure this reaches the output

test/tb.v

@@ -47,7 +47,7 @@ module tb;
   initial begin
     #100;
     rst_n = 1;  // Release reset
-    #50;
+    #100;       // Allow stabilization
     ena = 1;    // Enable I2S transmitter and waveform generation
 
     #200;
@@ -61,15 +61,17 @@ module tb;
   task uart_send(input [7:0] data);
     reg [3:0] i;
     begin
-      ui_in[0] = 0;  // Start bit
+      ui_in[0] <= 0;  // Start bit
       #2604;
 
       for (i = 0; i < 8; i = i + 1) begin
-        ui_in[0] = (data >> i) & 1;
+        @(posedge clk);
+        ui_in[0] <= (data >> i) & 1;
         #2604;  // 9600 baud bit time
       end
 
-      ui_in[0] = 1;  // Stop bit
+      @(posedge clk);
+      ui_in[0] <= 1;  // Stop bit
       #2604;
 
       // Wait for processing before sending the next command
@@ -80,24 +82,24 @@ module tb;
   // Test sequence for UART commands & I2S validation
   reg [3:0] j;
   initial begin
-    #100;
+    #200;
 
     // Test wave selection
     uart_send(8'h54);  // 'T' for Triangle wave
     #2000;
-    assert (uo_out !== 8'b0) else $display("ERROR: Triangle wave not generated!");
+    assert (uo_out[2:0] !== 3'b000) else $display("ERROR: Triangle wave not generated!");
 
     uart_send(8'h53);  // 'S' for Sawtooth wave
     #2000;
-    assert (uo_out !== 8'b0) else $display("ERROR: Sawtooth wave not generated!");
+    assert (uo_out[2:0] !== 3'b000) else $display("ERROR: Sawtooth wave not generated!");
 
     uart_send(8'h51);  // 'Q' for Square wave
     #2000;
-    assert (uo_out !== 8'b0) else $display("ERROR: Square wave not generated!");
+    assert (uo_out[2:0] !== 3'b000) else $display("ERROR: Square wave not generated!");
 
-    uart_send(8'h57);  // 'W' for Sine wave (now using CORDIC)
+    uart_send(8'h57);  // 'W' for Sine wave (CORDIC)
     #2000;
-    assert (uo_out !== 8'b0) else $display("ERROR: Sine wave not generated!");
+    assert (uo_out[2:0] !== 3'b000) else $display("ERROR: Sine wave not generated!");
 
     // Test frequency selection
     for (j = 0; j < 10; j = j + 1) begin
@@ -109,7 +111,7 @@ module tb;
     // White Noise Test
     uart_send(8'h4E);  // Enable White Noise
     #2000;
-    assert (uo_out !== 8'b0) else $display("ERROR: White noise not generated!");
+    assert (uo_out[2:0] !== 3'b000) else $display("ERROR: White noise not generated!");
 
     uart_send(8'h46);  // Disable White Noise
     #2000;