GitHub - K-Kielak/tlv-exercises: Repository to learn Verilog and TL-Verilog. Leads to RISC-V CPU hardware implementation

Personal repository for learning Verilog and Transaction-Level Verilog (TLV).

All of the TLV code was run using makerchip.com

Courses that inspired some of the code:

Name		Name	Last commit message	Last commit date
Latest commit History 34 Commits
tl-verilog		tl-verilog
verilog		verilog
.gitignore		.gitignore
README.md		README.md

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