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[SPIR-V] Support SPV_INTEL_arbitrary_precision_integers extension#250

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michalpaszkowski wants to merge 3 commits intofeature/spirv-backend-llvm15_0_7from
feature_SPV_INTEL_arbitrary_precision_integers_extension
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[SPIR-V] Support SPV_INTEL_arbitrary_precision_integers extension#250
michalpaszkowski wants to merge 3 commits intofeature/spirv-backend-llvm15_0_7from
feature_SPV_INTEL_arbitrary_precision_integers_extension

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This patch adds support for the SPV_INTEL_arbitrary_precision_integers extension, enums for new extensions (58-102), and other misc methods for checking extension and capabilities requirements.

This patch adds support for TargetExtType/target(...) representing
SPIR-V builtin types. After D135202, target(...) is the preferred way
for representing SPIR-V builtin types in LLVM IR and the only working
in the opaque pointer mode.

In order to maintain compatibility with LLVM IR generated by older
versions of Clang and LLVM/SPIR-V Translator, pointers-to-opaque-structs
denoting SPIR-V/OpenCL builtin types will be translated to equivalent
SPIR-V target extension types. This translation is only available in the
typed pointer mode (-opaque-pointers=0).

The relevant LIT tests with SPIR-V builtins were converted to use the
new target(...) notation.
@michalpaszkowski michalpaszkowski force-pushed the feature_SPV_INTEL_arbitrary_precision_integers_extension branch from 154f0d5 to 021aaf0 Compare March 12, 2023 23:36
@michalpaszkowski michalpaszkowski force-pushed the feature_SPV_INTEL_arbitrary_precision_integers_extension branch from 021aaf0 to 7f30096 Compare March 14, 2023 13:21
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I am considering extracting generating all instructions relevant to extensions (decorations, capabilities, etc.) out to a separate pass. I will prepare a an experimental pull request.

If it works out, I will consider extracting emitting capabilities also to a separate pass. Then SPIRVModuleAnalysis would truly be "analysis only" pass.

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