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Labeeb2339 merged 2 commits into from
Jul 22, 2026
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docs: write README in maintainer voice #1

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docs: write README in maintainer voice
Labeeb2339 Jul 22, 2026
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docs: make scope language direct
Labeeb2339 Jul 22, 2026
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14 changes: 7 additions & 7 deletions README.md
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# Edge AI RTL Lab

A small, reproducible hardware-design project that connects quantized AI
inference arithmetic with an RTL verification workflow. The core computes a
signed int8 vector dot product using one multiply-accumulate lane, then clamps
I built Edge AI RTL Lab as a small, reproducible hardware-design project that
connects quantized AI inference arithmetic with an RTL verification workflow.
The core computes a signed int8 vector dot product using one multiply-accumulate
lane, then clamps
the exact internal sum to a signed output width.

The project is intentionally scoped as a learning and portfolio artifact: it
demonstrates parameterized SystemVerilog, ready/valid control, a bit-exact
Python reference model, deterministic regression, and CI. It is **not** a
trained AI model or a complete neural-network accelerator.
I kept the scope deliberately small: parameterized SystemVerilog, ready/valid
control, a bit-exact Python reference model, deterministic regression, and CI.
This is **not** a trained AI model or a complete neural-network accelerator.

## What is implemented

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