languages/verilog: init module

[AleksandarZhekovski]

Add basic Verilog support using Verible and tree-setter-systemverilog.

Sanity Checking

• I have updated the changelog as per my changes
• I have tested, and self-reviewed my code
• My changes fit guidelines found in hacking nvf
• Style and consistency
  • I ran Alejandra to format my code (nix fmt)
  • My code conforms to the editorconfig configuration of the project
  • My changes are consistent with the rest of the codebase
• If new changes are particularly complex:
  • My code includes comments in particularly complex areas
  • I have added a section in the manual
  • (For breaking changes) I have included a migration guide
• Package(s) built:
  • .#nix (default package)
  • .#maximal
  • .#docs-html (manual, must build)
  • .#docs-linkcheck (optional, please build if adding links)
• Tested on platform(s)
  • x86_64-linux
  • aarch64-linux
  • x86_64-darwin
  • aarch64-darwin

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[github-actions]

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Debug Information

Triggered by: AleksandarZhekovski

HEAD at: feature/verilog_support

Reruns: 1497

[sjcobb2022]

Hi there,

There is a big initiative to move away from lspconfig with the changes in #1018.

All new language modules are being merged into that branch. There shouldn't be too many changes needed to get parity. You can take a look at the other language modules to see how it is done.

[AleksandarZhekovski]

I'll look into it this weekend.

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