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Improve compose() errors for circuit width mismatches#15945

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TSS99 wants to merge 3 commits intoQiskit:mainfrom
TSS99:codex/compose-width-errors
Open

Improve compose() errors for circuit width mismatches#15945
TSS99 wants to merge 3 commits intoQiskit:mainfrom
TSS99:codex/compose-width-errors

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@TSS99 TSS99 commented Apr 4, 2026

Summary

Fixes #13935.

This updates QuantumCircuit.compose() to raise clearer error messages when the circuit being composed is wider than the destination circuit.

Specifically:

  • qubit-width mismatches now report the source and destination qubit counts
  • classical-bit-width mismatches now report the source and destination classical-bit counts

What changed

  • replaced the internal-facing "more 'in' edges" error with user-facing CircuitError messages
  • added regression tests covering:
    • composing a 2-qubit circuit into a 1-qubit circuit
    • composing a circuit with 2 classical bits into a circuit with 1 classical bit

Why

The previous error message exposed internal graph terminology that is hard for new users to interpret. This change makes the failure mode more actionable and easier to understand.

Testing

tox -epy313 -- -n test.python.circuit.test_compose

AI disclosure

I used OpenAI Codex (GPT-5) for implementation assistance, and I reviewed and understood all changes before submitting this PR.

@TSS99 TSS99 requested a review from a team as a code owner April 4, 2026 11:45
@qiskit-bot qiskit-bot added the Community PR PRs from contributors that are not 'members' of the Qiskit repo label Apr 4, 2026
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if other.num_qubits > dest.num_qubits:
raise CircuitError(
"Trying to compose with another QuantumCircuit which has more 'in' edges."
f"Cannot compose a circuit with {other.num_qubits} qubit(s) "
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The point here is that other cannot have more qubits/clbits than dest. Can we make the message reflect that? E.g.

Cannot compose onto a circuit that has less qubits ({other.num_qubits} > {dest.num_qubits})

for all of them?

bfs_successors as core_bfs_successors, descendants as core_descendants,
};

fn dag_compose_width_error(bit_kind: &str, other: usize, dest: usize) -> String {
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We should tell cargo to inline this since it's just a call to format!

Suggested change
fn dag_compose_width_error(bit_kind: &str, other: usize, dest: usize) -> String {
#[inline]
fn dag_compose_width_error(bit_kind: &str, other: usize, dest: usize) -> String {

The even nicer solution would be to have Rust-based DAGCircuitErrors and have an error variant for this with the correctly formatted string. But given that the error type is imported from Python we can't do that yet.

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Composing incompatible circuits raises obscure message about "more 'in' edges"

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