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[hc32] Add the ev_hc32f4a8_lqfp176 board and modify some bsp drivers. #10228

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[hc32] Add the ev_hc32f4a8_lqfp176 board and modify some bsp drivers. #10228

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1002d31
[hc32] Add the ev_hc32f4a8_lqfp176 board and modify some bsp drivers.
JamieTx Apr 24, 2025
4c5a274
Optimize SConscript code.
JamieTx Apr 25, 2025
86552c9
add k230 ci check
kurisaW Apr 24, 2025
eb7ef42
[BSP][N32G45XVL]适配串口v2驱动 (#10222)
koudaiNEW Apr 24, 2025
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7 changes: 7 additions & 0 deletions .github/ALL_BSP_COMPILE.json
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Expand Up @@ -397,6 +397,13 @@
"qemu-virt64-riscv"
]
},
{
"RTT_BSP": "K230",
"RTT_TOOL_CHAIN": "riscv64-unknown-linux-musl-",
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应该改不到这里的代码，估计git操作哪里不对。
下次可以用下面两个命令
git fetch origin
git rebase origin/master

"SUB_RTT_BSP": [
"k230"
]
},
{
"RTT_BSP": "hpmicro",
"RTT_TOOL_CHAIN": "RISC-V-GCC-RV32",
Expand Down
8 changes: 8 additions & 0 deletions .github/workflows/bsp_buildings.yml
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Expand Up @@ -183,6 +183,14 @@ jobs:
/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gcc --version
echo "RTT_EXEC_PATH=/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin" >> $GITHUB_ENV

- name: Install k230 MUSL ToolChains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'riscv64-unknown-linux-musl-' && matrix.legs.RTT_BSP == 'K230' && success() }}
run: |
wget -q https://download.rt-thread.org/rt-smart/riscv64/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu_251248.tar.bz2
sudo tar xjf riscv64-linux-musleabi_for_x86_64-pc-linux-gnu_251248.tar.bz2 -C /opt
/opt/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu/bin/riscv64-unknown-linux-musl-gcc --version
echo "RTT_EXEC_PATH=/opt/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu/bin" >> $GITHUB_ENV

- name: Install riscv32-unknown-elf Toolchains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'RISC-V-GCC-RV32' && success() }}
run: |
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4 changes: 2 additions & 2 deletions bsp/hc32/ev_hc32f448_lqfp80/board/board.h
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Expand Up @@ -20,8 +20,8 @@
extern "C" {
#endif


#define HC32_FLASH_SIZE_GRANULARITY (8 * 1024)
#define HC32_FLASH_ERASE_GRANULARITY (8 * 1024)
#define HC32_FLASH_WRITE_GRANULARITY (4)
#define HC32_FLASH_SIZE (256 * 1024)
#define HC32_FLASH_START_ADDRESS (0)
#define HC32_FLASH_END_ADDRESS (HC32_FLASH_START_ADDRESS + HC32_FLASH_SIZE)
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2 changes: 1 addition & 1 deletion bsp/hc32/ev_hc32f448_lqfp80/board/board_config.c
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Expand Up @@ -157,7 +157,7 @@ void CanPhyEnable(void)
TCA9539_ConfigPin(CAN2_STB_PORT, CAN2_STB_PIN, TCA9539_DIR_OUT);
#endif
}
rt_err_t rt_hw_board_can_init(CM_MCAN_TypeDef *MCANx)
rt_err_t rt_hw_board_mcan_init(CM_MCAN_TypeDef *MCANx)
{
rt_err_t result = RT_EOK;

Expand Down
40 changes: 15 additions & 25 deletions ...hc32f448_lqfp80/board/config/can_config.h → ...c32f448_lqfp80/board/config/mcan_config.h
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Expand Up @@ -9,8 +9,8 @@
* 2024-02-20 CDT first version
*/

#ifndef __CAN_CONFIG_H__
#define __CAN_CONFIG_H__
#ifndef __MCAN_CONFIG_H__
#define __MCAN_CONFIG_H__

#include <rtthread.h>
#include "irq_config.h"
Expand All @@ -21,16 +21,6 @@ extern "C" {

/***********************************************************************************************/
/***********************************************************************************************/
// The arguments of RT command RT_CAN_CMD_SET_CANFD
#define MCAN_FD_CLASSICAL 0 /* CAN classical */
#define MCAN_FD_ISO_FD_NO_BRS 1 /* ISO CAN FD without BRS */
#define MCAN_FD_ISO_FD_BRS 2 /* ISO CAN FD with BRS */
#define MCAN_FD_NON_ISO_FD_NO_BRS 3 /* non-ISO CAN FD without BRS */
#define MCAN_FD_NON_ISO_FD_BRS 4 /* non-ISO CAN FD with BRS */

#define MCAN_FD_ARG_MIN MCAN_FD_ISO_FD_NO_BRS
#define MCAN_FD_ARG_MAX MCAN_FD_NON_ISO_FD_BRS

/* The default configuration for MCANs. Users can modify the configurations based on the application.
For the message RAM:
1. MCAN1 and MCAN2 share 2048 bytes message RAM
Expand Down Expand Up @@ -59,7 +49,7 @@ extern "C" {
#endif

#ifdef BSP_USING_MCAN1
#define MCAN1_NAME ("can1")
#define MCAN1_NAME ("mcan1")
#define MCAN1_WORK_MODE (RT_CAN_MODE_NORMAL)
#define MCAN1_TX_PRIV_MODE RT_CAN_MODE_NOPRIV /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */

Expand All @@ -77,7 +67,7 @@ extern "C" {
#endif /* BSP_USING_MCAN1 */

#ifdef BSP_USING_MCAN2
#define MCAN2_NAME ("can2")
#define MCAN2_NAME ("mcan2")
#define MCAN2_WORK_MODE (RT_CAN_MODE_NORMAL)
#define MCAN2_TX_PRIV_MODE RT_CAN_MODE_NOPRIV /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */

Expand Down Expand Up @@ -234,9 +224,9 @@ extern "C" {
#define MCAN_FD_CFG_1M_5M \
{ \
.u32NominalPrescaler = 1, \
.u32NominalTimeSeg1 = 64, \
.u32NominalTimeSeg2 = 16, \
.u32NominalSyncJumpWidth = 16, \
.u32NominalTimeSeg1 = 32, \
.u32NominalTimeSeg2 = 8, \
.u32NominalSyncJumpWidth = 8, \
.u32DataPrescaler = 1, \
.u32DataTimeSeg1 = 6, \
.u32DataTimeSeg2 = 2, \
Expand All @@ -249,9 +239,9 @@ extern "C" {
#define MCAN_FD_CFG_1M_8M \
{ \
.u32NominalPrescaler = 1, \
.u32NominalTimeSeg1 = 64, \
.u32NominalTimeSeg2 = 16, \
.u32NominalSyncJumpWidth = 16, \
.u32NominalTimeSeg1 = 32, \
.u32NominalTimeSeg2 = 8, \
.u32NominalSyncJumpWidth = 8, \
.u32DataPrescaler = 1, \
.u32DataTimeSeg1 = 4, \
.u32DataTimeSeg2 = 1, \
Expand Down Expand Up @@ -344,12 +334,12 @@ extern "C" {

#ifdef RT_CAN_USING_CANFD
#define MCAN1_BAUD_RATE_CFG MCAN_FD_CFG_1M_4M
#define MCAN1_NOMINAL_BAUD_RATE MCANFD_NOMINAL_BAUD_1M
#define MCAN1_DATA_BAUD_RATE MCANFD_DATA_BAUD_4M
#define MCAN1_NOMINAL_BAUD_RATE CANFD_DATA_BAUD_1M
#define MCAN1_DATA_BAUD_RATE CANFD_DATA_BAUD_4M

#define MCAN2_BAUD_RATE_CFG MCAN_FD_CFG_1M_4M
#define MCAN2_NOMINAL_BAUD_RATE MCANFD_NOMINAL_BAUD_1M
#define MCAN2_DATA_BAUD_RATE MCANFD_DATA_BAUD_4M
#define MCAN2_NOMINAL_BAUD_RATE CANFD_DATA_BAUD_1M
#define MCAN2_DATA_BAUD_RATE CANFD_DATA_BAUD_4M

#else
#define MCAN1_BAUD_RATE_CFG MCAN_CC_CFG_1M
Expand All @@ -369,6 +359,6 @@ extern "C" {
}
#endif

#endif /* __CAN_CONFIG_H__ */
#endif /* __MCAN_CONFIG_H__ */


175 changes: 0 additions & 175 deletions bsp/hc32/ev_hc32f448_lqfp80/board/config/spi_config.h
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Expand Up @@ -195,181 +195,6 @@ extern "C" {
#endif /* SPI3_RX_DMA_CONFIG */
#endif /* BSP_SPI3_RX_USING_DMA */

#ifdef BSP_USING_SPI4
#ifndef SPI4_BUS_CONFIG
#define SPI4_BUS_CONFIG \
{ \
.Instance = CM_SPI4, \
.bus_name = "spi4", \
.clock = FCG1_PERIPH_SPI4, \
.timeout = 5000UL, \
.err_irq.irq_config = \
{ \
.irq_num = BSP_SPI4_ERR_IRQ_NUM, \
.irq_prio = BSP_SPI4_ERR_IRQ_PRIO, \
.int_src = INT_SRC_SPI4_SPEI, \
}, \
}
#endif /* SPI4_BUS_CONFIG */
#endif /* BSP_USING_SPI4 */

#ifdef BSP_SPI4_TX_USING_DMA
#ifndef SPI4_TX_DMA_CONFIG
#define SPI4_TX_DMA_CONFIG \
{ \
.Instance = SPI4_TX_DMA_INSTANCE, \
.channel = SPI4_TX_DMA_CHANNEL, \
.clock = SPI4_TX_DMA_CLOCK, \
.trigger_select = SPI4_TX_DMA_TRIG_SELECT, \
.trigger_event = EVT_SRC_SPI4_SPTI, \
.flag = SPI4_TX_DMA_TRANS_FLAG, \
.irq_config = \
{ \
.irq_num = SPI4_TX_DMA_IRQn, \
.irq_prio = SPI4_TX_DMA_INT_PRIO, \
.int_src = SPI4_TX_DMA_INT_SRC, \
} \
}
#endif /* SPI4_TX_DMA_CONFIG */
#endif /* BSP_SPI4_TX_USING_DMA */

#ifdef BSP_SPI4_RX_USING_DMA
#ifndef SPI4_RX_DMA_CONFIG
#define SPI4_RX_DMA_CONFIG \
{ \
.Instance = SPI4_RX_DMA_INSTANCE, \
.channel = SPI4_RX_DMA_CHANNEL, \
.clock = SPI4_RX_DMA_CLOCK, \
.trigger_select = SPI4_RX_DMA_TRIG_SELECT, \
.trigger_event = EVT_SRC_SPI4_SPRI, \
.flag = SPI4_RX_DMA_TRANS_FLAG, \
.irq_config = \
{ \
.irq_num = SPI4_RX_DMA_IRQn, \
.irq_prio = SPI4_RX_DMA_INT_PRIO, \
.int_src = SPI4_RX_DMA_INT_SRC, \
} \
}
#endif /* SPI4_RX_DMA_CONFIG */
#endif /* BSP_SPI4_RX_USING_DMA */

#ifdef BSP_USING_SPI5
#ifndef SPI5_BUS_CONFIG
#define SPI5_BUS_CONFIG \
{ \
.Instance = CM_SPI5, \
.bus_name = "spi5", \
.clock = FCG1_PERIPH_SPI5, \
.timeout = 5000UL, \
.err_irq.irq_config = \
{ \
.irq_num = BSP_SPI5_ERR_IRQ_NUM, \
.irq_prio = BSP_SPI5_ERR_IRQ_PRIO, \
.int_src = INT_SRC_SPI5_SPEI, \
}, \
}
#endif /* SPI5_BUS_CONFIG */
#endif /* BSP_USING_SPI5 */

#ifdef BSP_SPI5_TX_USING_DMA
#ifndef SPI5_TX_DMA_CONFIG
#define SPI5_TX_DMA_CONFIG \
{ \
.Instance = SPI5_TX_DMA_INSTANCE, \
.channel = SPI5_TX_DMA_CHANNEL, \
.clock = SPI5_TX_DMA_CLOCK, \
.trigger_select = SPI5_TX_DMA_TRIG_SELECT, \
.trigger_event = EVT_SRC_SPI5_SPTI, \
.flag = SPI5_TX_DMA_TRANS_FLAG, \
.irq_config = \
{ \
.irq_num = SPI5_TX_DMA_IRQn, \
.irq_prio = SPI5_TX_DMA_INT_PRIO, \
.int_src = SPI5_TX_DMA_INT_SRC, \
} \
}
#endif /* SPI5_TX_DMA_CONFIG */
#endif /* BSP_SPI5_TX_USING_DMA */

#ifdef BSP_SPI5_RX_USING_DMA
#ifndef SPI5_RX_DMA_CONFIG
#define SPI5_RX_DMA_CONFIG \
{ \
.Instance = SPI5_RX_DMA_INSTANCE, \
.channel = SPI5_RX_DMA_CHANNEL, \
.clock = SPI5_RX_DMA_CLOCK, \
.trigger_select = SPI5_RX_DMA_TRIG_SELECT, \
.trigger_event = EVT_SRC_SPI5_SPRI, \
.flag = SPI5_RX_DMA_TRANS_FLAG, \
.irq_config = \
{ \
.irq_num = SPI5_RX_DMA_IRQn, \
.irq_prio = SPI5_RX_DMA_INT_PRIO, \
.int_src = SPI5_RX_DMA_INT_SRC, \
} \
}
#endif /* SPI5_RX_DMA_CONFIG */
#endif /* BSP_SPI5_RX_USING_DMA */

#ifdef BSP_USING_SPI6
#ifndef SPI6_BUS_CONFIG
#define SPI6_BUS_CONFIG \
{ \
.Instance = CM_SPI6, \
.bus_name = "spi6", \
.clock = FCG1_PERIPH_SPI6, \
.timeout = 5000UL, \
.err_irq.irq_config = \
{ \
.irq_num = BSP_SPI6_ERR_IRQ_NUM, \
.irq_prio = BSP_SPI6_ERR_IRQ_PRIO, \
.int_src = INT_SRC_SPI6_SPEI, \
}, \
}
#endif /* SPI6_BUS_CONFIG */
#endif /* BSP_USING_SPI6 */

#ifdef BSP_SPI6_TX_USING_DMA
#ifndef SPI6_TX_DMA_CONFIG
#define SPI6_TX_DMA_CONFIG \
{ \
.Instance = SPI6_TX_DMA_INSTANCE, \
.channel = SPI6_TX_DMA_CHANNEL, \
.clock = SPI6_TX_DMA_CLOCK, \
.trigger_select = SPI6_TX_DMA_TRIG_SELECT, \
.trigger_event = EVT_SRC_SPI6_SPTI, \
.flag = SPI6_TX_DMA_TRANS_FLAG, \
.irq_config = \
{ \
.irq_num = SPI6_TX_DMA_IRQn, \
.irq_prio = SPI6_TX_DMA_INT_PRIO, \
.int_src = SPI6_TX_DMA_INT_SRC, \
} \
}
#endif /* SPI6_TX_DMA_CONFIG */
#endif /* BSP_SPI6_TX_USING_DMA */

#ifdef BSP_SPI6_RX_USING_DMA
#ifndef SPI6_RX_DMA_CONFIG
#define SPI6_RX_DMA_CONFIG \
{ \
.Instance = SPI6_RX_DMA_INSTANCE, \
.channel = SPI6_RX_DMA_CHANNEL, \
.clock = SPI6_RX_DMA_CLOCK, \
.trigger_select = SPI6_RX_DMA_TRIG_SELECT, \
.trigger_event = EVT_SRC_SPI6_SPRI, \
.flag = SPI6_RX_DMA_TRANS_FLAG, \
.irq_config = \
{ \
.irq_num = SPI6_RX_DMA_IRQn, \
.irq_prio = SPI6_RX_DMA_INT_PRIO, \
.int_src = SPI6_RX_DMA_INT_SRC, \
} \
}
#endif /* SPI6_RX_DMA_CONFIG */
#endif /* BSP_SPI6_RX_USING_DMA */


#ifdef __cplusplus
}
#endif
Expand Down
2 changes: 1 addition & 1 deletion bsp/hc32/ev_hc32f448_lqfp80/board/drv_config.h
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Expand Up @@ -24,7 +24,7 @@ extern "C" {
#include "adc_config.h"
#include "dac_config.h"
#include "gpio_config.h"
#include "can_config.h"
#include "mcan_config.h"
#include "pm_config.h"
#include "i2c_config.h"
#include "qspi_config.h"
Expand Down
3 changes: 2 additions & 1 deletion bsp/hc32/ev_hc32f460_lqfp100_v2/board/board.h
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Expand Up @@ -20,7 +20,8 @@ extern "C" {
#endif


#define HC32_FLASH_SIZE_GRANULARITY (8 * 1024)
#define HC32_FLASH_ERASE_GRANULARITY (8 * 1024)
#define HC32_FLASH_WRITE_GRANULARITY (4)
#define HC32_FLASH_SIZE (512 * 1024)
#define HC32_FLASH_START_ADDRESS (0)
#define HC32_FLASH_END_ADDRESS (HC32_FLASH_START_ADDRESS + HC32_FLASH_SIZE)
Expand Down
3 changes: 2 additions & 1 deletion bsp/hc32/ev_hc32f472_lqfp100/board/board.h
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Expand Up @@ -21,7 +21,8 @@ extern "C" {
#endif


#define HC32_FLASH_SIZE_GRANULARITY (8 * 1024)
#define HC32_FLASH_ERASE_GRANULARITY (8 * 1024)
#define HC32_FLASH_WRITE_GRANULARITY (4)
#define HC32_FLASH_SIZE (512 * 1024)
#define HC32_FLASH_START_ADDRESS (0)
#define HC32_FLASH_END_ADDRESS (HC32_FLASH_START_ADDRESS + HC32_FLASH_SIZE)
Expand Down
9 changes: 0 additions & 9 deletions bsp/hc32/ev_hc32f472_lqfp100/board/config/can_config.h
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Expand Up @@ -20,9 +20,6 @@ extern "C" {

#ifdef BSP_USING_CAN1
#define CAN1_CLOCK_SEL (CAN_CLOCK_SRC_40M)
#ifdef RT_CAN_USING_CANFD
#define CAN1_CANFD_MODE (CAN_FD_MD_ISO)
#endif
#define CAN1_NAME ("can1")
#ifndef CAN1_INIT_PARAMS
#define CAN1_INIT_PARAMS \
Expand All @@ -35,9 +32,6 @@ extern "C" {

#ifdef BSP_USING_CAN2
#define CAN2_CLOCK_SEL (CAN_CLOCK_SRC_40M)
#ifdef RT_CAN_USING_CANFD
#define CAN2_CANFD_MODE (CAN_FD_MD_ISO)
#endif
#define CAN2_NAME ("can2")
#ifndef CAN2_INIT_PARAMS
#define CAN2_INIT_PARAMS \
Expand All @@ -50,9 +44,6 @@ extern "C" {

#ifdef BSP_USING_CAN3
#define CAN3_CLOCK_SEL (CAN_CLOCK_SRC_40M)
#ifdef RT_CAN_USING_CANFD
#define CAN3_CANFD_MODE (CAN_FD_MD_ISO)
#endif
#define CAN3_NAME ("can3")
#ifndef CAN3_INIT_PARAMS
#define CAN3_INIT_PARAMS \
Expand Down
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