Sync with upstream (2025-08-27): 5de587c1f7afa2f7a619441a7b8887853662a655 #4105
+157,956
−120,890
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Just like r16-465-gf2bb7ffe84840d8 but this time
instead of a VCE there is a full on load from a boolean.
This showed up when trying to remove the extra copy
in the testcase from the revision mentioned above (pr120122-1.c).
So when moving loads from a boolean type from being conditional
to non-conditional, the load needs to become a full load and then
casted into a bool so that the upper bits are correct.
Bitfields loads will always do the truncation so they don't need to
be rewritten. Non boolean types always do the truncation too.
What we do is wrap the original reference with a VCE which causes
the full load and then do a casting to do the truncation. Using
fold_build1 with VCE will do the correct thing if there is a secondary
VCE and will also fold if this was just a plain MEM_REF so there is
no need to handle those 2 cases special either.
Changes since v1:
* v2: Use VIEW_CONVERT_EXPR instead of doing a manual load.
Accept all non mode precision loads rather than just
boolean ones.
* v3: Move back to checking boolean type. Don't handle BIT_FIELD_REF.
Add asserts for IMAG/REAL_PART_EXPR.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/121279
gcc/ChangeLog:
* gimple-fold.cc (gimple_needing_rewrite_undefined): Return
true for non mode precision boolean loads.
(rewrite_to_defined_unconditional): Handle non mode precision loads.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr121279-1.c: New test.
Signed-off-by: Andrew Pinski <[email protected]>
While looking at this code I noticed that we don't remove the old switch index assignment if it is only used in the switch after it is modified in simplify_gimple_switch. This fixes that by marking the old switch index for the dce worklist. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-ssa-forwprop.cc (simplify_gimple_switch): Add simple_dce_worklist argument. Mark the old index when doing the replacement. (pass_forwprop::execute): Update call to simplify_gimple_switch. Signed-off-by: Andrew Pinski <[email protected]>
Since r5-4705-ga499aac5dfa5d9, remove_prop_source_from_use has always return false. This removes the return type of remove_prop_source_from_use and cleans up the usage of remove_prop_source_from_use. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-ssa-forwprop.cc (remove_prop_source_from_use): Remove return type. (forward_propagate_into_comparison): Update dealing with no return type of remove_prop_source_from_use. (forward_propagate_into_gimple_cond): Likewise. (simplify_permutation): Likewise. Signed-off-by: Andrew Pinski <[email protected]>
After changing the return type of remove_prop_source_from_use, forward_propagate_into_comparison will never return 2. So boolify forward_propagate_into_comparison. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-ssa-forwprop.cc (forward_propagate_into_comparison): Boolify. (pass_forwprop::execute): Don't handle return of 2 from forward_propagate_into_comparison. Signed-off-by: Andrew Pinski <[email protected]>
After the return type of remove_prop_source_from_use was changed to void, simplify_permutation only returns 1 or 0 so it can be boolified. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-ssa-forwprop.cc (simplify_permutation): Boolify. (pass_forwprop::execute): No longer handle 2 as the return from simplify_permutation. Signed-off-by: Andrew Pinski <[email protected]>
CTF array encoding uses uint32 for number of elements. This means there is a hard upper limit on array types which the format can represent. GCC internally was also using a uint32_t for this, which would overflow when translating from DWARF for arrays with more than UINT32_MAX elements. Use an unsigned HOST_WIDE_INT instead to fetch the array bound, and fall back to CTF_K_UNKNOWN if the array cannot be represented in CTF. PR debug/121411 gcc/ * dwarf2ctf.cc (gen_ctf_subrange_type): Use unsigned HWI for array_num_elements. Fallback to CTF_K_UNKNOWN if the array type has too many elements for CTF to represent. gcc/testsuite/ * gcc.dg/debug/ctf/ctf-array-7.c: New test.
PR tree-optimization/121656 * gcc.dg/pr121656.c: New file. Signed-off-by: H.J. Lu <[email protected]>
…PR121453] When expand_omp_for_init_counts is called from expand_omp_for_generic, zero_iter1_bb is NULL and the code always creates a new bb in which it clears fd->loop.n2 var (if it is a var), because it can dominate code with lastprivate guards that use the var. When called from other places, zero_iter1_bb is non-NULL and so we don't insert the clearing (and can't, because the same bb is used also for the non-zero iterations exit and in that case we need to preserve the iteration count). Clearing is also not necessary when e.g. outermost collapsed loop has constant non-zero number of iterations, in that case we initialize the var to something already earlier. The following patch makes sure to clear it if it hasn't been initialized yet before the first check for zero iterations. 2025-08-26 Jakub Jelinek <[email protected]> PR middle-end/121453 * omp-expand.cc (expand_omp_for_init_counts): Clear fd->loop.n2 before first zero count check if zero_iter1_bb is non-NULL upon entry and fd->loop.n2 has not been written yet. * gcc.dg/gomp/pr121453.c: New test.
This patch would like to combine the vec_duplicate + vmacc.vv to the
vmacc.vx. From example as below code. The related pattern will depend
on the cost of vec_duplicate from GR2VR. Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.
Assume we have example code like below, GR2VR cost is 0.
#define DEF_VX_TERNARY_CASE_0(T, OP_1, OP_2, NAME) \
void \
test_vx_ternary_##NAME##_##T##_case_0 (T * restrict vd, T * restrict vs2, \
T rs1, unsigned n) \
{ \
for (unsigned i = 0; i < n; i++) \
vd[i] = vd[i] OP_2 vs2[i] OP_1 rs1; \
}
DEF_VX_TERNARY_CASE_0(int32_t, *, +, macc)
Before this patch:
11 │ beq a3,zero,.L8
12 │ vsetvli a5,zero,e32,m1,ta,ma
13 │ vmv.v.x v2,a2
...
16 │ .L3:
17 │ vsetvli a5,a3,e32,m1,ta,ma
...
22 │ vmacc.vv v1,v2,v3
...
25 │ bne a3,zero,.L3
After this patch:
11 │ beq a3,zero,.L8
...
14 │ .L3:
15 │ vsetvli a5,a3,e32,m1,ta,ma
...
20 │ vmacc.vx v1,a2,v3
...
23 │ bne a3,zero,.L3
gcc/ChangeLog:
* config/riscv/vector.md (@pred_mul_plus_vx_<mode>): Add new pattern to
generate vmacc rtl.
(*pred_macc_<mode>_scalar_undef): Ditto.
* config/riscv/autovec-opt.md (*vmacc_vx_<mode>): Add new
pattern to match the vmacc vx combine.
Signed-off-by: Pan Li <[email protected]>
…VR cost 0, 1 and 15 Add asm dump check and run test for vec_duplicate + vmacc.vvm combine to vmacc.vx, with the GR2VR cost is 0, 2 and 15. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check for vx combine. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary.h: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary_data.h: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary_run.h: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmacc-run-1-i16.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmacc-run-1-i32.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmacc-run-1-i64.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmacc-run-1-i8.c: New test. Signed-off-by: Pan Li <[email protected]>
…R2VR cost 0, 1 and 15 Add asm dump check and run test for vec_duplicate + vmacc.vvm combine to vmacc.vx, with the GR2VR cost is 0, 2 and 15. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check for vx combine. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmacc-run-1-u16.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmacc-run-1-u32.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmacc-run-1-u64.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmacc-run-1-u8.c: New test. Signed-off-by: Pan Li <[email protected]>
The vgf2p8affineqb_<mode><mask_name> pattern uses "register_operand" predicate for the first input operand, so using "general_operand" for the rotate operand passed to it leads to ICEs, and so does the "nonimmediate_operand" in the <insn>v16qi3 define_expand. The following patch fixes it by using "register_operand" in the former case (that pattern is TARGET_GFNI only) and using force_reg in the latter case (the pattern is TARGET_XOP || TARGET_GFNI and for XOP we can handle MEM operand). The rest of the changes are small formatting tweaks or use of const0_rtx instead of GEN_INT (0). 2025-08-26 Jakub Jelinek <[email protected]> PR target/121658 * config/i386/sse.md (<insn><mode>3 any_shift): Use const0_rtx instead of GEN_INT (0). (cond_<insn><mode> any_shift): Likewise. Formatting fix. (<insn><mode>3 any_rotate): Use register_operand predicate instead of general_operand for match_operand 1. Use const0_rtx instead of GEN_INT (0). (<insn>v16qi3 any_rotate): Use force_reg on operands[1]. Formatting fix. * config/i386/i386.cc (ix86_shift_rotate_cost): Comment formatting fixes. * gcc.target/i386/pr121658.c: New test.
This was added when invariants/externals outside of SLP didn't have an easily accessible vector type. Now it's redundant so the following removes it. * tree-vectorizer.h (stmt_vec_info_::reduc_vectype_in): Remove. (STMT_VINFO_REDUC_VECTYPE_IN): Likewise. * tree-vect-loop.cc (vect_is_emulated_mixed_dot_prod): Get at the input vectype via the SLP node child. (vectorizable_lane_reducing): Likewise. (vect_transform_reduction): Likewise. (vectorizable_reduction): Do not set STMT_VINFO_REDUC_VECTYPE_IN.
The following makes sure to read from the lanes_ifn member only when necessary (and thus it was set). * tree-vect-stmts.cc (vectorizable_store): Access lanes_ifn only when VMAT_LOAD_STORE_LANES. (vectorizable_load): Likewise.
The following addresses a bogus swapping of SLP operands of a reduction operation which gets STMT_VINFO_REDUC_IDX out of sync with the SLP operand order. In fact the most obvious mistake is that we simply swap operands even on the first stmt even when there's no difference in the comparison operators (for == and != at least). But there are more latent issues that I noticed and fixed up in the process. PR tree-optimization/121659 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not allow matching up comparison operators by swapping if that would disturb STMT_VINFO_REDUC_IDX. Make sure to only actually mark operands for swapping when there was a mismatch and we're not processing the first stmt. * gcc.dg/vect/pr121659.c: New testcase.
The following changes the vect_reduc_type API to work on the SLP node. The API is only used from the aarch64 backend, so all changes are there. In particular I noticed aarch64_force_single_cycle is invoked even for scalar costing (where the flag tested isn't computed yet), I figured in scalar costing all reductions are a single cycle. * tree-vectorizer.h (vect_reduc_type): Get SLP node as argument. * config/aarch64/aarch64.cc (aarch64_sve_in_loop_reduction_latency): Take SLO node as argument and adjust. (aarch64_in_loop_reduction_latency): Likewise. (aarch64_detect_vector_stmt_subtype): Adjust. (aarch64_vector_costs::count_ops): Likewise. Treat reductions during scalar costing as single-cycle.
The compiler is getting too smart! But this test is really intended to test that we generate BICS instead of BIC+CMP, so make the test use something that we can't subsequently fold away into a bit minipulation of a store-flag value. I've also added a couple of extra tests, so we now cover both the cases where we fold the result away and where that cannot be done. Also add a test that we don't generate a compare against 0, since that's really part of what this test is covering. gcc/testsuite: * gcc.target/arm/bics_3.c: Add some additional tests that cannot be folded to a bit manipulation.
Recent changes from Kito have an unused parameter. On the assumption that he's going to likely want it as part of the API, I've simply removed the parameter's name until such time as Kito needs it. This should restore bootstrapping to the RISC-V port. Committing now rather than waiting for the CI system given bootstrap builds currently fail. * config/riscv/riscv.cc (riscv_arg_partial_bytes): Remove name from unused parameter.
…oint multiply This pattern enables the combine pass (or late-combine, depending on the case) to merge a vec_duplicate into a mult RTL instruction. Before this patch, we have two instructions, e.g.: vfmv.v.f v2,fa0 vfmul.vv v1,v1,v2 After, we get only one: vfmul.vf v2,v2,fa0 gcc/ChangeLog: * config/riscv/autovec-opt.md (*vfmul_vf_<mode>): Add new pattern to combine vec_duplicate + vfmul.vv into vfmul.vf. * config/riscv/vector.md (@pred_<optab><mode>_scalar): Allow VLS modes. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfmul. * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf_binop.h: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_data.h: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_run.h: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f16.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f32.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmul-run-1-f64.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-mul-2.c: Adjust scan dump. * gcc.target/riscv/rvv/autovec/vls/floating-point-mul-3.c: Likewise.
…op is invariant [PR121290]
Consider the example:
void
f (int *restrict x, int *restrict y, int *restrict z, int n)
{
for (int i = 0; i < 4; ++i)
{
int res = 0;
for (int j = 0; j < 100; ++j)
res += y[j] * z[i];
x[i] = res;
}
}
we currently vectorize as
f:
movi v30.4s, 0
ldr q31, [x2]
add x2, x1, 400
.L2:
ld1r {v29.4s}, [x1], 4
mla v30.4s, v29.4s, v31.4s
cmp x2, x1
bne .L2
str q30, [x0]
ret
which is not useful because by doing outer-loop vectorization we're performing
less work per iteration than we would had we done inner-loop vectorization and
simply unrolled the inner loop.
This patch teaches the cost model that if all your leafs are invariant, then
adjust the loop cost by * VF, since every vector iteration has at least one lane
really just doing 1 scalar.
There are a couple of ways we could have solved this, one is to increase the
unroll factor to process more iterations of the inner loop. This removes the
need for the broadcast, however we don't support unrolling the inner loop within
the outer loop. We only support unrolling by increasing the VF, which would
affect the outer loop as well as the inner loop.
We also don't directly support costing inner-loop vs outer-loop vectorization,
and as such we're left trying to predict/steer the cost model ahead of time to
what we think should be profitable. This patch attempts to do so using a
heuristic which penalizes the outer-loop vectorization.
We now cost the loop as
note: Cost model analysis:
Vector inside of loop cost: 2000
Vector prologue cost: 4
Vector epilogue cost: 0
Scalar iteration cost: 300
Scalar outside cost: 0
Vector outside cost: 4
prologue iterations: 0
epilogue iterations: 0
missed: cost model: the vector iteration cost = 2000 divided by the scalar iteration cost = 300 is greater or equal to the vectorization factor = 4.
missed: not vectorized: vectorization not profitable.
missed: not vectorized: vector version will never be profitable.
missed: Loop costings may not be worthwhile.
And subsequently generate:
.L5:
add w4, w4, w7
ld1w z24.s, p6/z, [x0, #1, mul vl]
ld1w z23.s, p6/z, [x0, #2, mul vl]
ld1w z22.s, p6/z, [x0, #3, mul vl]
ld1w z29.s, p6/z, [x0]
mla z26.s, p6/m, z24.s, z30.s
add x0, x0, x8
mla z27.s, p6/m, z23.s, z30.s
mla z28.s, p6/m, z22.s, z30.s
mla z25.s, p6/m, z29.s, z30.s
cmp w4, w6
bls .L5
and avoids the load and replicate if it knows it has enough vector pipes to do
so.
gcc/ChangeLog:
PR target/121290
* config/aarch64/aarch64.cc
(class aarch64_vector_costs ): Add m_loop_fully_scalar_dup.
(aarch64_vector_costs::add_stmt_cost): Detect invariant inner loops.
(adjust_body_cost): Adjust final costing if m_loop_fully_scalar_dup.
gcc/testsuite/ChangeLog:
PR target/121290
* gcc.target/aarch64/pr121290.c: New test.
This pattern enables the combine pass (or late-combine, depending on the case) to merge a vec_duplicate into a div RTL instruction. The vec_duplicate is the dividend operand. Before this patch, we have two instructions, e.g.: vfmv.v.f v2,fa0 vfdiv.vv v1,v2,v1 After, we get only one: vfrdiv.vf v1,v1,fa0 gcc/ChangeLog: * config/riscv/autovec-opt.md (*vfrdiv_vf_<mode>): Add new pattern to combine vec_duplicate + vfdiv.vv into vfrdiv.vf. * config/riscv/vector.md (@pred_<optab><mode>_reverse_scalar): Allow VLS modes. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfrdiv. * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c: Likewise. * gcc.target/riscv/rvv/autovec/vx_vf/vf_binop.h: Add support for reverse variants. * gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_data.h: Add data for reverse variants. * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f16.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f32.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfrdiv-run-1-f64.c: New test.
…OD_EXPR/SAD_EXPR The patch is trying to unroll the vectorized loop when there're FMA/DOT_PRDO_EXPR/SAD_EXPR reductions, it will break cross-iteration dependence and enable more parallelism(since vectorize will also enable partial sum). When there's gather/scatter or scalarization in the loop, don't do the unroll since the performance bottleneck is not at the reduction. The unroll factor is set according to FMA/DOT_PROX_EXPR/SAD_EXPR CEIL ((latency * throught), num_of_reduction) .i.e For fma, latency is 4, throught is 2, if there's 1 FMA for reduction then unroll factor is 2 * 4 / 1 = 8. There's also a vect_unroll_limit, the final suggested_unroll_factor is set as MIN (vect_unroll_limix, 8). The vect_unroll_limit is mainly for register pressure, avoid to many spills. Ideally, all instructions in the vectorized loop should be used to determine unroll_factor with their (latency * throughput) / number, but that would too much for this patch, and may just GIGO, so the patch only considers 3 kinds of instructions: FMA, DOT_PROD_EXPR, SAD_EXPR. Note when DOT_PROD_EXPR is not native support, m_num_reduction += 3 * count which almost prevents unroll. There's performance boost for simple benchmark with DOT_PRDO_EXPR/FMA chain, slight improvement in SPEC2017 performance. gcc/ChangeLog: * config/i386/i386.cc (ix86_vector_costs::ix86_vector_costs): Addd new memeber m_num_reduc, m_prefer_unroll. (ix86_vector_costs::add_stmt_cost): Set m_prefer_unroll and m_num_reduc (ix86_vector_costs::finish_cost): Determine m_suggested_unroll_vector with consideration of reduc_lat_mult_thr, m_num_reduction and ix86_vect_unroll_limit. * config/i386/i386.h (enum ix86_reduc_unroll_factor): New enum. (processor_costs): Add reduc_lat_mult_thr and vect_unroll_limit. * config/i386/x86-tune-costs.h: Initialize reduc_lat_mult_thr and vect_unroll_limit. * config/i386/i386.opt: Add -param=ix86-vect-unroll-limit. gcc/testsuite/ChangeLog: * gcc.target/i386/vect_unroll-1.c: New test. * gcc.target/i386/vect_unroll-2.c: New test. * gcc.target/i386/vect_unroll-3.c: New test. * gcc.target/i386/vect_unroll-4.c: New test. * gcc.target/i386/vect_unroll-5.c: New test.
…d stop_source The move constructors for stop_source and stop_token are equivalent to copying and clearing the raw pointer, as they are wrappers for a counted-shared state. For jthread, the move constructor performs a member-wise move of stop_source and thread. While std::thread could also have a _Never_valueless_alt specialization due to its inexpensive move (only moving a handle), doing so now would change the ABI. This patch takes the opportunity to correct this behavior for jthread, before C++20 API is marked stable. libstdc++-v3/ChangeLog: * include/std/stop_token (__variant::_Never_valueless_alt): Declare. (__variant::_Never_valueless_alt<std::stop_token>) (__variant::_Never_valueless_alt<std::stop_source>): Define. * include/std/thread: (__variant::_Never_valueless_alt): Declare. (__variant::_Never_valueless_alt<std::jthread>): Define.
This patch refactors the implementation of bind_front and bind_back to avoid using std::tuple for argument storage. Instead, bound arguments are now: * stored directly if there is only one, * within a dedicated _Bound_arg_storage otherwise. _Bound_arg_storage is less expensive to instantiate and access than std::tuple. It can also be trivially copyable, as it doesn't require a non-trivial assignment operator for reference types. Storing a single argument directly provides similar benefits compared to both one element tuple or _Bound_arg_storage. _Bound_arg_storage holds each argument in an _Indexed_bound_arg base object. The base class is parameterized by both type and index to allow storing multiple arguments of the same type. Invocations are handled by _S_apply_front amd _S_apply_back static functions, which simulate explicit object parameters. To facilitate this, the __like_t alias template is now unconditionally available since C++11 in bits/move.h. libstdc++-v3/ChangeLog: * include/bits/move.h (std::__like_impl, std::__like_t): Make available in c++11. * include/std/functional (std::_Indexed_bound_arg) (std::_Bound_arg_storage, std::__make_bound_args): Define. (std::_Bind_front, std::_Bind_back): Use _Bound_arg_storage. * testsuite/20_util/function_objects/bind_back/1.cc: Expand test to cover cases of 0, 1, many bound args. * testsuite/20_util/function_objects/bind_back/111327.cc: Likewise. * testsuite/20_util/function_objects/bind_front/1.cc: Likewise. * testsuite/20_util/function_objects/bind_front/111327.cc: Likewise. Reviewed-by: Jonathan Wakely <[email protected]> Reviewed-by: Patrick Palka <[email protected]> Signed-off-by: Tomasz Kamiński <[email protected]>
This patch introduces a new function, _M_fill_append, which is invoked when copies of the same value are appended to the end of a vector. Unlike _M_fill_insert(end(), n, v), _M_fill_append never permute elements in place, so it does not require: * vector element type to be assignable; * a copy of the inserted value, in the case where it points to an element of the vector. vector::resize(n, v) now uses _M_fill_append, fixing the non-conformance where element types were required to be assignable. In addition, _M_fill_insert(end(), n, v) now delegates to _M_fill_append, which eliminates an unnecessary copy of v when the existing capacity is used. PR libstdc++/90192 libstdc++-v3/ChangeLog: * include/bits/stl_vector.h (vector<T>::_M_fill_append): Declare. (vector<T>::fill): Use _M_fill_append instead of _M_fill_insert. * include/bits/vector.tcc (vector<T>::_M_fill_append): Define (vector<T>::_M_fill_insert): Delegate to _M_fill_append when elements are appended. * testsuite/23_containers/vector/modifiers/moveable.cc: Updated copycount for inserting at the end (appending). * testsuite/23_containers/vector/modifiers/resize.cc: New test. * testsuite/backward/hash_set/check_construct_destroy.cc: Updated copycount, the hash_set constructor uses insert to fill buckets with nullptrs. Reviewed-by: Jonathan Wakely <[email protected]> Signed-off-by: Tomasz Kamiński <[email protected]>
Disable sched2 and sched3 to only have one order of instructions to consider. gcc/testsuite/ChangeLog: * gcc.target/arm/unsigned-extend-2.c: Disable sched2 and sched3 and update function body to match. Signed-off-by: Torbjörn SVENSSON <[email protected]>
The test fails to compile on 32-bit targets because the arrays are too large. Restrict to targets where the array index type is 64-bits. Also note the relevant PR in the test comment. PR debug/121411 gcc/testsuite/ * gcc.dg/debug/ctf/ctf-array-7.c: Restrict to lp64,llp64 targets.
The offset-based partial specialization of _CachedPosition for random-access iterators is currently only selected if the offset type is smaller than the iterator type. Before r12-1018-g46ed811bcb4b86 this made sense since the main partial specialization only stored the iterator (incorrectly). After that bugfix, the main partial specialization now effectively stores a std::optional<iter> so the size constraint is inaccurate. And this main partial specialization must invalidate itself upon copy/move unlike the offset-based partial specialization. So I think we should just always prefer the offset-based _CachedPosition for a random-access iterator, even if the offset type happens to be larger than the iterator type. libstdc++-v3/ChangeLog: * include/std/ranges (__detail::_CachedPosition): Remove additional size constraint on the offset-based partial specialization. Reviewed-by: Tomasz Kamiński <[email protected]> Reviewed-by: Jonathan Wakely <[email protected]>
Shreya and I were working through some testsuite failures and noticed that many of the current failures on the pioneer were just silly. We have tests that expect to see full architecture strings in their expected output when the bulk (some might say all) of the architecture string is irrelevant. Worse yet, we'd have different matching lines. ie we'd have one that would machine rv64gc_blah_blah and another for rv64imfa_blah_blah. Judicious wildcard usage cleans this up considerably. This fixes ~80 failures in the riscv.exp testsuite. Pushing to the trunk as it's happy on the pioneer native, riscv32-elf and riscv64-elf. gcc/testsuite/ * gcc.target/riscv/arch-25.c: Use wildcards to simplify/eliminate dg-error directives. * gcc.target/riscv/arch-ss-2.c: Similarly. * gcc.target/riscv/arch-zilsd-2.c: Similarly. * gcc.target/riscv/arch-zilsd-3.c: Similarly.
Constrained symbols were not properly identified, this lead to erroneous errors with generics. gcc/rust/ChangeLog: * typecheck/rust-hir-type-check-base.cc (walk_type_to_constrain): Walk through all kind of type to collect ty leaves. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
Function pointers were not allowed to be cast to any integer like type just like regular pointers were. gcc/rust/ChangeLog: * typecheck/rust-casts.cc (TypeCastRules::cast_rules): Authorize cast from function pointer to integer like type. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
Remove usage of error state (but not error state itelf) and use an optional to convey the missing value meaning instead. gcc/rust/ChangeLog: * backend/rust-compile-expr.cc (CompileExpr::generate_closure_fntype): Unwrap the optional. * backend/rust-compile.cc: Change return type container. Adapt code to new return type. * typecheck/rust-hir-dot-operator.cc: Likewise. * typecheck/rust-hir-path-probe.cc: Likewise. * typecheck/rust-hir-type-check-implitem.cc (TypeCheckImplItemWithTrait::visit): Likewise. * typecheck/rust-hir-type-check-type.cc (TypeCheckType::visit): Likewise. * typecheck/rust-tyty-bounds.cc (TypeBoundPredicate::contains_item): Likewise. (TypeBoundPredicate::lookup_associated_item): Likewise. (TypeBoundPredicateItem::get_parent): Likewise. (TypeBoundPredicate::lookup_associated_type): Likewise. * typecheck/rust-tyty.cc (BaseType::satisfies_bound): Likewise. * typecheck/rust-hir-type-check-path.cc (TypeCheckExpr::visit): Change return type. * typecheck/rust-tyty.h: Likewise. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
Variable path was copying the path but not using one of the copies. gcc/rust/ChangeLog: * resolve/rust-ast-resolve-stmt.cc (ResolveStmt::visit): Remove unused copy. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
Construct the TypeBoundPredicate in the vector instead of copying it. gcc/rust/ChangeLog: * typecheck/rust-hir-trait-resolve.cc (TraitResolver::resolve_trait): Construct value in place. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
Multiple local variables were not read beyond their assignments. gcc/rust/ChangeLog: * typecheck/rust-hir-type-check-expr.cc (TypeCheckExpr::visit): Remove unused assignment. * typecheck/rust-hir-type-check-path.cc (TypeCheckExpr::resolve_segments): Likewise. * typecheck/rust-tyty.cc (ParamType::handle_substitions): Likewise. * typecheck/rust-unify.cc (UnifyRules::go): Likewise. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
gcc/rust/ChangeLog: * typecheck/rust-coercion.cc (TypeCoercionRules::do_coercion): Refactor common return statement. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
Error kind were split between error state and out bool parameter. gcc/rust/ChangeLog: * typecheck/rust-coercion.cc (TypeCoercionRules::do_coercion): Adapt call to new return type. (TypeCoercionRules::coerce_unsized): Change error handling. * typecheck/rust-coercion.h: Update function prototype and add new CoerceUnsizedError error type. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
gcc/rust/ChangeLog: * typecheck/rust-coercion.cc (TypeCoercionRules::do_coercion): Move nevertype coercion from here... (TypeCoercionRules::coerce_never): ... to here. * typecheck/rust-coercion.h: Add function prototype. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
gcc/rust/ChangeLog: * typecheck/rust-coercion.cc (TypeCoercionRules::do_coercion): Use as member function. (TypeCoercionRules::coerce_borrowed_pointer): Likewise. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
gcc/testsuite/ChangeLog: * rust/compile/impl_fnptr.rs: New test. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
This improves our handling of PathInExpression and fixes #4056. gcc/rust/ChangeLog: * parse/rust-parse-impl.h (Parser::parse_expr): Avoid skipping or splitting tokens. (Parser::null_denotation): Assume initial token was not skipped and adjust function signature to match. Use parse_path_in_expression instead of parse_path_in_expression_pratt and handle SCOPE_RESOLUTION. (Parser::parse_path_in_expression_pratt): Remove function. * parse/rust-parse.h (null_denotation): Remove initial token parameter. (parse_path_in_expression_pratt): Remove function. gcc/testsuite/ChangeLog: * rust/compile/global-path-array.rs: New test. Signed-off-by: Owen Avery <[email protected]>
This allows format_args!(some_macro!(...), ...) to compile. gcc/rust/ChangeLog: * expand/rust-macro-builtins-format-args.cc (format_args_parse_arguments): Split format expression parsing into... (format_args_parse_expr): ...a new function here, while handling eager expansion. (MacroBuiltin::format_args_handler): Use format_args_parse_expr. gcc/testsuite/ChangeLog: * rust/compile/format_args_concat.rs: New test. Signed-off-by: Owen Avery <[email protected]>
gcc/rust/ChangeLog: * ast/rust-ast-collector.cc (TokenCollector::visit): Use should_have_str instead of has_str. * ast/rust-ast.cc (Token::as_string): Likewise. * expand/rust-macro-builtins-offset-of.cc (MacroBuiltin::offset_of_handler): Likewise. * lex/rust-lex.cc (Lexer::dump_and_skip): Likewise. * ast/rust-ast.h (class Token): Remove dead code. (Token::has_str): Remove function. (Token::should_have_str): New function. * lex/rust-token.cc (Token::get_str): Remove function definition. * lex/rust-token.h: Include "rust-diagnostics.h". (Token::str): Change type from std::unique_ptr<std::string> to std::string. (Token::Token): Adjust initialization of str member variable and the type of the parameter used to initialize it. (Token::make_identifier): Accept std::string instead of rvalue reference to std::string. (Token::make_int): Likewise. (Token::make_float): Likewise. (Token::make_string): Likewise. (Token::make_byte_string): Likewise. (Token::make_raw_string): Likewise. (Token::make_inner_doc_comment): Likewise. (Token::make_outer_doc_comment): Likewise. (Token::make_lifetime): Likewise. (Token::get_str): Add definition to function declaration. (Token::has_str): Remove member function. (Token::should_have_str): Handle INNER_DOC_COMMENT and OUTER_DOC_COMMENT. Signed-off-by: Owen Avery <[email protected]>
Patterns include TuplePattern, TupleStructPattern & SlicePattern. Besides making their pattern items container class inherit from a common `PatternItems` base class just like in HIR for better standardization, mentions of `Range` are also changed to `HasRest` or `NoRest`. gcc/rust/ChangeLog: * ast/rust-pattern.h: - Add a new base abstract class `PatternItems` which are used by pattern items class class derivatives for `TuplePattern`, `TupleStructPattern` & `SlicePattern`. - Standardized the derived class names to have `HasRest` or `NoRest` as suffixes. - Values for the common `ItemType` enum is updated to `HAS_REST` or `NO_REST`. * ast/rust-pattern.cc: Renamed the classes accordingly. * ast/rust-ast-collector.cc: Renamed the classes accordingly. * ast/rust-ast-collector.h: Renamed the classes accordingly. * ast/rust-ast-full-decls.h: Renamed the classes accordingly. * ast/rust-ast-visitor.cc: Renamed the classes accordingly. * ast/rust-ast-visitor.h: Renamed the classes accordingly. * ast/rust-desugar-for-loops.cc: Renamed the classes accordingly. * ast/rust-desugar-question-mark.cc: Renamed the classes accordingly. * expand/rust-cfg-strip.cc: Renamed the classes accordingly. * expand/rust-cfg-strip.h: Renamed the classes accordingly. * expand/rust-derive-clone.cc: Renamed the classes accordingly. * expand/rust-derive-cmp-common.cc: Renamed the classes accordingly. * expand/rust-derive-hash.cc: Renamed the classes accordingly. * expand/rust-derive-ord.cc: Renamed the classes accordingly. * expand/rust-derive-partial-eq.cc: Renamed the classes accordingly. * expand/rust-derive.h: Renamed the classes accordingly. * expand/rust-expand-visitor.cc: Renamed the classes accordingly. * expand/rust-expand-visitor.h: Renamed the classes accordingly. * hir/rust-ast-lower-base.cc: Renamed the classes accordingly. * hir/rust-ast-lower-base.h: Renamed the classes accordingly. * hir/rust-ast-lower-pattern.cc: Renamed the classes accordingly. * hir/tree/rust-hir-pattern.h: Renamed the classes accordingly. * parse/rust-parse-impl.h: Renamed the classes accordingly. * resolve/rust-ast-resolve-base.cc: Renamed the classes accordingly. * resolve/rust-ast-resolve-base.h: Renamed the classes accordingly. * resolve/rust-ast-resolve-pattern.cc: Renamed the classes accordingly. * util/rust-attributes.cc: Renamed the classes accordingly. * util/rust-attributes.h: Renamed the classes accordingly. Signed-off-by: Yap Zhi Heng <[email protected]>
gcc/rust/ChangeLog: * checks/errors/privacy/rust-privacy-check.cc: Adjust includes. (Resolver::resolve): Pass 2.0 name resolution context to VisibilityResolver and PrivacyReporter. * checks/errors/privacy/rust-privacy-reporter.cc (PrivacyReporter::PrivacyReporter): Change type of resolver parameter. (is_child_module): Remove static function. (PrivacyReporter::check_for_privacy_violation): Assume nr2.0 is enabled and handle removal of is_child_module. * checks/errors/privacy/rust-privacy-reporter.h: Adjust includes. (PrivacyReporter::PrivacyReporter): Change type of resolver parameter. (PrivacyReporter::resolver): Change member variable type. * checks/errors/privacy/rust-visibility-resolver.cc: Adjust includes. (VisibilityResolver::VisibilityResolver): Change type of resolver parameter. (VisibilityResolver::resolve_module_path): Assume nr2.0 is enabled. * checks/errors/privacy/rust-visibility-resolver.h: Adjust includes. (VisibilityResolver::VisibilityResolver): Change type of resolver parameter. (VisibilityResolver::resolver): Change member variable type. Signed-off-by: Owen Avery <[email protected]>
gcc/rust/ChangeLog: * rust-session-manager.cc: Remove inclusion of name resolution 1.0 headers. (Session::compile_crate): Assume name resolution 2.0 is enabled. (Session::expansion): Likewise. (Session::load_extern_crate): Likewise. Signed-off-by: Owen Avery <[email protected]>
gcc/rust/ChangeLog: * checks/errors/rust-hir-pattern-analysis.cc: Remove inclusion of "options.h". (PatternChecker::PatternChecker): Change initialization of resolver reference. (PatternChecker::visit): Assume name resolution 2.0 is enabled. * checks/errors/rust-hir-pattern-analysis.h: Include nr2.0 header instead of nr1.0 header. (PatternChecker::resolver): Change type to nr2.0 resolver. Signed-off-by: Owen Avery <[email protected]>
gcc/rust/ChangeLog: * checks/errors/borrowck/rust-bir-builder-internal.h: Remove inclusion of "rust-name-resolver.h". (BuilderContext::resolver): Change type to nr2.0 resolver. (BuilderContext::BuilderContext): Change initialization of resolver reference. (AbstractBuilder::resolve_label): Assume name resolution 2.0 is enabled. (AbstractBuilder::resolve_variable): Likewise. (AbstractBuilder::resolve_variable_or_fn): Likewise. Signed-off-by: Owen Avery <[email protected]>
Marking a TupleIndexExpr for strip makes it invalid for a generic visitor gcc/rust/ChangeLog: * ast/rust-expr.h (class TupleIndexExpr): Store strip information. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
gcc/rust/ChangeLog: * Make-lang.in: Compile it. * ast/rust-builtin-ast-nodes.h: Add missing methods for getting pointers. * ast/rust-expr.h: Likewise. * ast/rust-item.h: Likewise. * ast/rust-path.h: Likewise. * ast/rust-pattern.h: Likewise. * ast/rust-type.h: Likewise. * ast/rust-ast-pointer-visitor.cc: New file. * ast/rust-ast-pointer-visitor.h: New file.
gcc/rust/ChangeLog: * ast/rust-expression-yeast.cc (ExpressionYeast::dispatch): Rename to... (ExpressionYeast::reseat): ...this. (ExpressionYeast::visit): Remove. * ast/rust-expression-yeast.h: Inherit from PointerVisitor, override reseat instead of declaring dispatch.
gcc/rust/ChangeLog: * rust-session-manager.cc (Session::compile_crate): Move the AST dump after parser error check. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
Unlike in C, floating point literals can't start with a '.', and therefore could never be split into a '.' followed by an integer. gcc/rust/ChangeLog: * parse/rust-parse-impl.h (Parser::left_denotation): Remove usage of parse_tuple_index_expr_float. (Parser::parse_closure_expr_pratt): Remove function. gcc/testsuite/ChangeLog: * rust/compile/parse_float_dot.rs: New test. Signed-off-by: Owen Avery <[email protected]>
gcc/rust/ChangeLog: * Make-lang.in (GRS_OBJS): Add "rust-resolve-builtins.o". * resolve/rust-late-name-resolver-2.0.cc: Include "rust-resolve-builtins.h". (next_node_id): Remove function. (next_hir_id): Likewise. (Late::setup_builtin_types): Likewise. (Late::go): Use Builtins::setup_type_ctx instead of Late::setup_builtin_types. * resolve/rust-late-name-resolver-2.0.h (Late::setup_builtin_types): Remove function. * rust-session-manager.cc: Include "rust-resolve-builtins.h". (Session::expansion): Call Builtins::setup_lang_prelude. * resolve/rust-resolve-builtins.cc: New file. * resolve/rust-resolve-builtins.h: New file. gcc/testsuite/ChangeLog: * rust/compile/primitive-import.rs: New test. Signed-off-by: Owen Avery <[email protected]>
gcc/rust/ChangeLog: * resolve/rust-early-name-resolver-2.0.cc (Early::visit): Emit an error on top level rebind self use declaration. gcc/testsuite/ChangeLog: * rust/compile/use_self_alone.rs: New test. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
gcc/rust/ChangeLog: * resolve/rust-early-name-resolver-2.0.cc (Early::finalize_rebind_import): Replace assert with early break and remove early return. (Early::visit): Check for unsuffixed lower self list. * resolve/rust-early-name-resolver-2.0.h: Add visit function prototype. gcc/testsuite/ChangeLog: * rust/compile/use_self_alone_in_list.rs: New test. Signed-off-by: Pierre-Emmanuel Patry <[email protected]>
…se/2025-08-27 This branch has a no-op merge as the last commit: - one arm is the "current" development branch from github - the other arm is a rebased version of the "current" master branch onto a recent GCC's master The merge is obtained with "git merge --strategy=ours" to only keep the changes from second arm.
|
I can fix the |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This is a sync with upstream GCC:
upstream GCC revision: 5de587c
gccrs github: 456dbb4
-- gerris 🦀