[Sergei Lissianoi (selissia)]

Issue Link:
https://jira.silabs.com/browse/MATTER-7182

Description of Problem/Feature:
MATTER-7182 OTA update fails on BRD4408A CMP Concurrent.
The bootloader_eraseWriteStorage() calls during OTA download keep the external flash busy, this interferes with the RAIL code execution timing and puts it into a state where the radio stops receiving Thread packets for multiple seconds. The issue is seen on BRD4408A as it uses a flash architecture that is different from the rest of the Series 3 boards.

Description of Fix/Solution:
Install ram_code_select_dma_channel_performance in the CMP app on BRD4408A. This component reduces DMA channel interrupt handlers latency by avoiding FLASH cache misses at the cost of higher RAM consumption.

Testing Done:
Verified that with this change the OTA update process completes on BRD4408A. Without this change the issue was 100% reproducible.

[cursor]

PR Summary

Low Risk
Build-time component wiring for a single board; no shared runtime logic changes beyond enabling an existing performance component on BRD4408A.

Overview
Adds a board-scoped SLC dependency on ram_code_select_dma_channel_performance for the Matter + Zigbee concurrent (matter_zigbee_concurrent) component, gated to BRD4408A only.

CMP builds on that board will pull in the RAM-code DMA channel performance selection component alongside existing Series3 fast-channel-switching requirements.

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[Sergei Lissianoi (selissia)]

I have read the CLA Document and I hereby sign the CLA behalf on myself, e-mail: selissia@silabs.com