FPGA family feature matrix

WIP page

There is a growing number of FPGA families that have support in the open source tools, but not all FPGA families are fully complete. It can be hard to keep track of all the projects out there, and decide which family is right for your project.

The table on this page aims to keep track of which FPGA primitives are supported by which project.

FPGA Family	Gowin LittleBee	MachXO2	Lattice ECP5	Lattice Nexus
Project	Apicula	Facade/Trellis	Trellis	prjoxide
Logic Slice	✔️	✔️	✔️	✔️
├ LUTRAM	❌	❌	✔️	✔️
└ ALU	✔️	❌	✔️	✔️
IO buffer	✔️	✔️	✔️	✔️
├ IO standards	✔️	⚠️	✔️	🚧
└ DDR/SERDES	❌	❌	✔️	🚧
Block RAM	❌	❌	✔️	✔️
DSP	❌	❌	✔️	✔️
PLL	❌	❌	✔️	⚠️
Routing	✔️	✔️	✔️	✔️
├ Local	✔️	✔️	✔️	✔️
├ Global	✔️	🚧	✔️	✔️
└ Long wires	❌	❌ (N/A)	❌ (N/A)	❌ (N/A)
Timing	✔️	❌	✔️	✔️
├ Logic	✔️	❌	✔️	✔️
├ Routing	✔️	❌	✔️	✔️
└ IO buffer	✔️	❌	🚧	🚧

symbol	meaning
✔️	complete, reliable
⚠️	nominally complete, not well-tested
🚧	incomplete
❌	unimplemented