nrf5x: Use RTC for timekeeping, track overflows for extra bits

[Grazfather]

The nrf TIMER is 32 bits, and with prescaler set to 4, it would count at exactly 1MHz.

This would overflow every 4294 seconds, which is not enough for many uses.

We could increase the prescaler up to 9, splitting the 32MHz clock to 62500Hz, which would still overflow every 68719 seconds, which is still less than a day.

The original plan was to set an interrupt to fire on overflow, to increment a counter, which could be used to add bits to this value, easily getting us 64 bits. The problem is that it introduced a race condition, because we could try to build the time extra when it overflowed, which would yield us an incorrect count (e.g. off by 4294 seconds). The way that embassy gets around this is by incrementing the counter when it overflows, as well as when it hits the halfway point, and then, depending on the value of the extra bits, choose to toggle the top bit of the counter or not.

Unfortunately, the TIMER register does not have the ability to fire an interrupt when it overflows, only when it hits a compare value. We could probably use two compare values (half way and on overflow), but I think it's probably better to follow the lead of embassy and use RTC, which has an explicit overflow event.

By user 23 bits of timer, with an interrupt that fires at 0x800000 and on overflow, we can track the time for 23 + 32 == 55 ticks.

This timer runs at a slower 32'768 Hz, which means we sacrifice granularity, but for timekeeping usually in the ms (not us) scale, it should not be a problem.

[mattnite]

lol I feel attacked

[tact1m4n3]

If we wanted to get really elaborate we could throw a compile error if the RTC interrupt handler is overwritten and hal.time is referenced. If the user wants to dismiss that warning he would have to set a flag in HAL_Options. Imo, these warnings that prevent the user from making a mistake should be part of the microzig at some point in the future but maybe now isn't the time :)