Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
27 changes: 27 additions & 0 deletions Readme.md
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,33 @@ All files from the PicoDVI repo are kept even if not used in this build
used via Pico SDK if desired.

Original Readme content:
=======
RP2350 PicoDVI Preview
======================

Changes from the public GitHub version:

* All Arm assembly in `libdvi` has been ported to RISC-V and tuned for Hazard3
* Some of the existing Arm assembly in `libdvi` has been tweaked for better performance on Cortex-M33
* RGB encode now uses the SIO TMDS encoders by default on RP2350 (can be disabled by defining `DVI_USE_SIO_TMDS_ENCODE=0` -- see `software/libdvi/dvi_config_defs.h`)
* Much of the Arm assembly in `libsprite` has been ported to RISC-V -- enough to run the stock demos

Build instructions:

```bash
cd software
mkdir build
# PICO_PLATFORM can also be rp2350-riscv
# List of DVI configs is in software/include/common_dvi_pin_configs.h
cmake -DPICO_SDK_PATH=/path/to/sdk -DPICO_PLATFORM=rp2350 -DPICO_COPY_TO_RAM=1 -DDVI_DEFAULT_SERIAL_CONFIG=pico_sock_cfg ..
make -j$(nproc)
# Then flash a binary, e.g.:
cp apps/tiles_and_sprites/tiles_and_sprites.uf2
```

If you plan to run the `vista` demo, then note that there are now two UF2 data files, `software/assets/vista_data_rp2040.uf2` and `software/assets/vista_data_rp2350.uf2`. The only difference is the family IDs: the first can be dragged on RP2040 and on RP2350 A0, and the second can be dragged on RP2350 A1 and later.

The following is the original RP2040 writeup:

Bitbanged DVI on the RP2040 Microcontroller
===========================================
Expand Down
1 change: 1 addition & 0 deletions software/.gitignore
Original file line number Diff line number Diff line change
@@ -1,2 +1,3 @@
build
*.swp
build-*
10 changes: 8 additions & 2 deletions software/apps/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -1,4 +1,7 @@
add_subdirectory(bad_apple)
if (NOT PICO_RISCV)
# Arm assembly needs porting to RISC-V
add_subdirectory(bad_apple)
endif()
add_subdirectory(colour_terminal)
add_subdirectory(christmas_snowflakes)
add_subdirectory(dht_logging)
Expand All @@ -12,5 +15,8 @@ add_subdirectory(tiles)
add_subdirectory(tiles_and_sprites)
add_subdirectory(tiles_parallax)
add_subdirectory(vista)
add_subdirectory(vista-palette)
if (PICO_RP2040)
# Needs porting to use XIP stream instead of SSI, as was done to vista
add_subdirectory(vista-palette)
endif()
add_subdirectory(mandel-full)
10 changes: 8 additions & 2 deletions software/apps/colour_terminal/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,6 @@
#include "hardware/gpio.h"
#include "hardware/vreg.h"
#include "hardware/structs/bus_ctrl.h"
#include "hardware/structs/ssi.h"
#include "hardware/dma.h"
#include "pico/sem.h"

Expand All @@ -27,6 +26,7 @@

// Pick one:
#define MODE_640x480_60Hz
// #define MODE_720x480_60Hz
// #define MODE_800x600_60Hz
// #define MODE_960x540p_60Hz
// #define MODE_1280x720_30Hz
Expand All @@ -38,14 +38,20 @@
#define VREG_VSEL VREG_VOLTAGE_1_20
#define DVI_TIMING dvi_timing_640x480p_60hz

#elif defined(MODE_720x480_60Hz)
// DVDD 1.2V
#define FRAME_WIDTH 720
#define FRAME_HEIGHT 480
#define VREG_VSEL VREG_VOLTAGE_1_20
#define DVI_TIMING dvi_timing_720x480p_60hz

#elif defined(MODE_800x600_60Hz)
// DVDD 1.3V, going downhill with a tailwind
#define FRAME_WIDTH 800
#define FRAME_HEIGHT 600
#define VREG_VSEL VREG_VOLTAGE_1_30
#define DVI_TIMING dvi_timing_800x600p_60hz


#elif defined(MODE_960x540p_60Hz)
// DVDD 1.25V (slower silicon may need the full 1.3, or just not work)
#define FRAME_WIDTH 960
Expand Down
65 changes: 61 additions & 4 deletions software/apps/colour_terminal/tmds_encode_font_2bpp.S
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
#include "hardware/regs/addressmap.h"
#include "hardware/regs/sio.h"

#ifndef __riscv
.syntax unified
.cpu cortex-m0plus
.thumb
#endif

// Using the following:
//
Expand Down Expand Up @@ -46,12 +48,13 @@
// r8 contains a pointer to the font bitmap for this scanline.
// r9 contains the TMDS LUT base.
.macro do_char charbuf_offs colour_shift_instr colour_shamt
#ifndef __riscv
// Get 8x font bits for next character, put 4 LSBs in bits 6:3 of r4 (so
// scaled to 8-byte LUT entries), and 4 MSBs in bits 6:3 of r6.
ldrb r4, [r0, #\charbuf_offs] // 2
add r4, r8 // 1
ldrb r4, [r4] // 2
lsrs r6, r4, #4 // 1
ldrb r4, [r0, #\charbuf_offs] // 2 (note these cycle
add r4, r8 // 1 counts are for M0+
ldrb r4, [r4] // 2 and are a little
lsrs r6, r4, #4 // 1 pessimistic on M33)
lsls r6, #3 // 1
lsls r4, #28 // 1
lsrs r4, #25 // 1
Expand All @@ -67,6 +70,31 @@
ldmia r4, {r4, r5} // 3
ldmia r6, {r6, r7} // 3
stmia r2!, {r4-r7} // 5
#else
lbu a4, \charbuf_offs(a0) // 1
\colour_shift_instr a5, a1, \colour_shamt // 1
add a4, a4, t1 // 1
lbu a4, (a4) // 2
srli a6, a4, 4 // 1
andi a4, a4, 0xf // 1

// Get colour bits, add to TMDS LUT base and font bits
and a5, a5, a3 // 1
add a5, a5, t2 // 1
sh3add a4, a4, a5 // 1
sh3add a6, a6, a5 // 1

// Look up and write out 8 TMDS symbols
lw a5, 4(a4) // 1
lw a4, 0(a4) // 1
lw a7, 4(a6) // 1
lw a6, 0(a6) // 1
sw a4, 0(a2) // 1
sw a5, 4(a2) // 1
sw a6, 8(a2) // 1
sw a7, 12(a2) // 1
addi a2, a2, 16 // 1
#endif
.endm


Expand All @@ -78,9 +106,12 @@

.section .scratch_x.tmds_encode_font_2bpp, "ax"
.global tmds_encode_font_2bpp
#ifndef __riscv
.type tmds_encode_font_2bpp,%function
.thumb_func
#endif
tmds_encode_font_2bpp:
#ifndef __riscv
push {r4-r7, lr}
mov r4, r8
mov r5, r9
Expand Down Expand Up @@ -123,6 +154,32 @@ tmds_encode_font_2bpp:
mov r10, r6
pop {r4-r7, pc}

#else

sh1add t0, a3, a2
li a3, 0xf0 * 8

mv t1, a4
la t2, palettised_1bpp_tables
mv t3, a1

bgeu a2, t0, 2f
1:
lw a1, (t3)
addi t3, t3, 4
do_char 0 slli 7
do_char 1 slli 3
do_char 2 srli 1
do_char 3 srli 5
do_char 4 srli 9
do_char 5 srli 13
do_char 6 srli 17
do_char 7 srli 21
addi a0, a0, 8
bltu a2, t0, 1b
2:
ret
#endif

// Table generation:
// levels_2bpp_even = [0x05, 0x50, 0xaf, 0xfa]
Expand Down
1 change: 0 additions & 1 deletion software/apps/mandel-full/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,6 @@
#include "hardware/pll.h"
#include "hardware/sync.h"
#include "hardware/structs/bus_ctrl.h"
#include "hardware/structs/ssi.h"
#include "hardware/vreg.h"
#include "pico/multicore.h"
#include "pico/sem.h"
Expand Down
11 changes: 9 additions & 2 deletions software/apps/terminal/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,6 @@
#include "hardware/gpio.h"
#include "hardware/vreg.h"
#include "hardware/structs/bus_ctrl.h"
#include "hardware/structs/ssi.h"
#include "hardware/dma.h"
#include "pico/sem.h"

Expand All @@ -25,7 +24,9 @@


// Pick one:

//#define MODE_640x480_60Hz
// #define MODE_720x480_60Hz
// #define MODE_800x600_60Hz
// #define MODE_960x540p_60Hz
#define MODE_1280x720_30Hz
Expand All @@ -37,14 +38,20 @@
#define VREG_VSEL VREG_VOLTAGE_1_20
#define DVI_TIMING dvi_timing_640x480p_60hz

#elif defined(MODE_720x480_60Hz)
// DVDD 1.2V
#define FRAME_WIDTH 720
#define FRAME_HEIGHT 480
#define VREG_VSEL VREG_VOLTAGE_1_20
#define DVI_TIMING dvi_timing_720x480p_60hz

#elif defined(MODE_800x600_60Hz)
// DVDD 1.3V, going downhill with a tailwind
#define FRAME_WIDTH 800
#define FRAME_HEIGHT 600
#define VREG_VSEL VREG_VOLTAGE_1_30
#define DVI_TIMING dvi_timing_800x600p_60hz


#elif defined(MODE_960x540p_60Hz)
// DVDD 1.25V (slower silicon may need the full 1.3, or just not work)
#define FRAME_WIDTH 960
Expand Down
6 changes: 4 additions & 2 deletions software/apps/tiles_parallax/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -127,8 +127,10 @@ void __not_in_flash("render") render_loop() {
tile16(pixbuf, &bg1, y, FRAME_WIDTH);
queue_add_blocking(&dvi0.q_colour_valid, &pixbuf);
}
bg0.xscroll += 1;
bg1.xscroll += 2;
bg1.xscroll += 1;
if (frame_ctr & 1) {
bg0.xscroll += 1;
}
++frame_ctr;
}
}
Expand Down
16 changes: 13 additions & 3 deletions software/apps/vista-palette/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -10,9 +10,19 @@ add_executable(vista-palette
# flash using direct SSI DMA, which would trample on XIP.
pico_set_binary_type(vista-palette copy_to_ram)

pico_define_boot_stage2(vista-palette_boot2 ${PICO_SDK_PATH}/src/rp2_common/boot_stage2/boot2_w25q080.S)
target_compile_definitions(vista-palette_boot2 PRIVATE PICO_FLASH_SPI_CLKDIV=4)
pico_set_boot_stage2(vista-palette vista-palette_boot2)

if (PICO_RP2040)
pico_define_boot_stage2(vista-palette_boot2 ${PICO_SDK_PATH}/src/rp2040/boot_stage2/boot2_w25q080.S)
pico_set_boot_stage2(vista-palette vista-palette_boot2)
target_compile_definitions(vista-palette_boot2 PRIVATE PICO_FLASH_SPI_CLKDIV=4)
else ()
target_compile_definitions(vista-palette PRIVATE
PICO_EMBED_XIP_SETUP=1
PICO_BOOT_STAGE2_CHOOSE_W25Q080=1
PICO_FLASH_SPI_CLKDIV=2
PICO_FLASH_SPI_RXDELAY=3
)
endif()

target_compile_definitions(vista-palette PRIVATE
DVI_DEFAULT_SERIAL_CONFIG=${DVI_DEFAULT_SERIAL_CONFIG}
Expand Down
13 changes: 13 additions & 0 deletions software/apps/vista/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,19 @@ target_compile_definitions(vista PRIVATE
DVI_SYMBOLS_PER_WORD=1
)

if (PICO_RP2040)
pico_define_boot_stage2(vista_boot2 ${PICO_SDK_PATH}/src/rp2040/boot_stage2/boot2_w25q080.S)
pico_set_boot_stage2(vista vista_boot2)
target_compile_definitions(vista_boot2 PRIVATE PICO_FLASH_SPI_CLKDIV=4)
else ()
target_compile_definitions(vista PRIVATE
PICO_EMBED_XIP_SETUP=1
PICO_BOOT_STAGE2_CHOOSE_W25Q080=1
PICO_FLASH_SPI_CLKDIV=2
PICO_FLASH_SPI_RXDELAY=3
)
endif()

target_compile_definitions(vista PRIVATE PICO_STACK_SIZE=0x200)

target_link_libraries(vista
Expand Down
Loading
Loading