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Add support for AD4052 ADC Family #2642
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Here it goes first round of review...
I think this one can be upstreamed without the offload bits
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Change log v0 -> v1 Review changes:
New:
Design changes:
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drivers/iio/adc/Kconfig
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tristate "Analog Devices AD4052 Driver" | ||
depends on SPI | ||
depends on PWM | ||
depends on GPIOLIB |
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I'm also not sure if gpio is something you should depend on or just select it. I think the single shot reading could be something useful to have even more to make this driver more upstreamable without offload support (we can still some questions about it though).
drivers/iio/adc/Kconfig
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tristate "Analog Devices AD4052 Driver" | ||
depends on SPI | ||
depends on PWM | ||
depends on GPIOLIB |
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Also one not on the commit message. Style is iio: adc: ...
. Drop the drivers:
if (val == 0) { | ||
st->mode = AD4052_SAMPLE_MODE; | ||
} else { | ||
st->mode = AD4052_BURST_AVERAGING_MODE; |
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I would double check other examples of oversampling. To me this is a 1 or 0 thing. Either it's enabled it not. Your mode variable also just seems to have two states here so the way you're handling val
raises some questions.
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The device supports from 2 to 4096 in powers of 2 samples for avg mode.
Decided to reserve 0 and 1 to disable the feature (return to sample mode)
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Change log v1 -> v2 Review changes:
Changes:
Extra force push to resolve merge conflict |
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drivers/iio/adc/ad4052.c
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spi_message_init_with_transfers(&st->msg, &st->xfer, 1); | ||
ret = spi_optimize_message(st->spi, &st->msg); | ||
if (ret) | ||
return ret; |
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__spi_unoptimize_message cannot be called on a message that is not currently optimized and spi_unoptimize_message only checks for defer_optimize_message, that just indicates the controller doesn't really optimize until the transfer is actually done.
Am I missing something here?
https://elixir.bootlin.com/linux/v6.13.4/source/drivers/spi/spi.c#L4344
AFAICT, it will just be called and then anything can happen... You should not make any assumption on how core code and even more importantly how a spi controller will handle this. The docs clearly stated that the calls should be balanced. Not doing so is clearly a driver bug IMO.
If I call devm_optimize_message, it will add the spi_unoptimize_message action to the list of managed resources over and over again, which is a no-no as explained in the last paragraph.
yes, since this function is also called from an userspace interface, indeed devm_action is also not the way to go...
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V8 Applies changes from previous discussion.
(1) The source of the unbalance was the raw read, because the message needed to be re-optimized on oversampling write to be ready for the raw read, or balance on the raw read, which makes no sense from the optimization point-of-view. Counter-intuitive behaviour: io_buffer_enabled(indio_dev)) does return true during buffer_preenable, so the requested scan type obtained is correct, even though the counterintuitive naming/sequence. Another point in favor of dropping raw xfer optimization is that oversampling set optimization could fail, setting the xfer in the un-optimized state, and on remove it would indeed call un-optimized on a un-optimized message, which in my tests do cause panic. |
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Just some minor comment... Looks ready to go upstream
drivers/iio/adc/ad4052.c
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#include <linux/iio/events.h> | ||
#include <linux/iio/iio.h> | ||
#include <linux/interrupt.h> | ||
#include <linux/of_irq.h> |
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the above header looks suspicious? Leftover?
drivers/iio/adc/ad4052.c
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struct device *dev = &st->spi->dev; | ||
int ret = 0; | ||
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ret = of_irq_get(st->spi->dev.of_node, 0); |
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Oh, you have it in here... Please use device property APIs. fwnode_irq_get()
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V9
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I'm not doing another round but saw this in the log which got my attention:
pm_ptr() should prevent that... Maybe that means you should instead use pm_sleep_ptr()? This macros were introduced exactly to avoid marking PM function with maybe_unused as the compiler/linker should be able to detect and remove "dead" code. |
If CONF_PM is disabled the methods are sinked/discarted and the relation between the .pm and the method is never created
https://lore.kernel.org/all/[email protected]/ with pm_sleep_ptr, if CONF_PM and CONF_PM_SLEEP are unset, the pointer is NULL and the warning is raised. |
Can you test with RUNTIME_PM_OPS() instead of SET_RUNTIME_PM_OPS()? The reason I'm pushing a bit is because, as you saw, this pm_sleep() macros were indeed introduced to avoid those __maybe_unused. BTW, I think pm_ptr() is indeed the right one to use (as you're using runtime PM) |
Yep, you are right, the modern way is RUNTIME_PM_OPS not SET_RUNTIME_PM_OPS . |
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V10
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Up-streaming at https://lore.kernel.org/all/[email protected]/ Below is a small bash script to convert from 'current' upstream and adi-linux
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The AD4052/AD4058/AD4050/AD4056 are versatile, 16-bit/12-bit, successive approximation register (SAR) analog-to-digital converter (ADC). The series starts with marking iio_dev as const in iio_buffer_enabled, to not discard the qualifier when calling from get_current_can_type. This is required since the size of storage bytes varies if the offload buffer is used or not. The scan_type also depends if the oversampling feature is enabled, since the 16-bit device increases the SPI word size from 16-bit to 24-bit. Also due to this, the spi message optimization is balanced on the buffer ops, instead of once per probe. SPI messages related to exiting the ADC mode, and reading raw values are never optimized. The device has autonomous monitoring capabilities, that are exposed as IIO events. Since register access requires leaving the monitoring state and returning, device access is blocked until the IIO event is disabled. An auxiliary method ad4052_iio_device_claim_direct manages the IIO claim direct as well as the required wait_event boolean. The device has an internal sampling rate for the autonomous modes, exposed as the sample_rate attribute. The device contains two required outputs: * gp0: Threshold event interrupt on the rising edge. * gp1: ADC conversion ready signal on the falling edge. The user should either invert the signal or set the IRQ as falling edge. And one optional input: * cnv: Triggers a conversion, can be replaced by shortening the CNV and SPI CS trace. The devices utilizes PM to enter the low power mode. The driver can be used with SPI controllers with and without offload support. A FPGA design is available: https://analogdevicesinc.github.io/hdl/projects/ad4052_ardz/ The devices datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ad4050-ad4056.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad4052-ad4058.pdf The unique monitoring capabilities and multiple GPIOs where the decision factor to have a standalone driver for this device family. Non-implemented features: * Status word: First byte of the SPI transfer aligned to the register address. * Averaging mode: Similar to burst averaging mode used in the oversampling, but requiring a sequence of CNV triggers for each conversion. * Monitor mode: Similar to trigger mode used in the monitoring mode, but doesn't exit to configuration mode on event, being awkward to expose to user space. An auxiliary method ad4052_iio_device_claim_direct manages the IIO claim direct as well as the required wait_event boolean. The device has an internal sampling rate for the autonomous modes, exposed as the sample_rate attribute. The device contains two required outputs: * gp0: Threshold event interrupt on the rising edge. * gp1: ADC conversion ready signal on the falling edge. The user should either invert the signal or set the IRQ as falling edge. And one optional input: * cnv: Triggers a conversion, can be replaced by shortening the CNV and SPI CS trace. The devices utilizes PM to enter the low power mode. The driver can be used with SPI controllers with and without offload support. A FPGA design is available: https://analogdevicesinc.github.io/hdl/projects/ad4052_ardz/ The devices datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ad4050-ad4056.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad4052-ad4058.pdf The unique monitoring capabilities and multiple GPIOs where the decision factor to have a standalone driver for this device family. Non-implemented features: * Status word: First byte of the SPI transfer aligned to the register address. * Averaging mode: Similar to burst averaging mode used in the oversampling, but requiring a sequence of CNV triggers for each conversion. * Monitor mode: Similar to trigger mode used in the monitoring mode, but doesn't exit to configuration mode on event, being awkward to expose to user space. Signed-off-by: Jorge Marques <[email protected]>
Some devices have an internal clock used by the events to space the conversions. Examples of devices with this internal clock are: max1363 and ad4052. The max1363 introduced the option in 168c9d9 (3.10). Signed-off-by: Jorge Marques <[email protected]>
Some devices have an internal clock used to space the conversion trigger for the oversampling filter. Examples of devices with this internal clock are: ad4052 and ad7606c. Signed-off-by: Jorge Marques <[email protected]>
The iio_dev struct is never modified inside the method, mark it as const. This allows to be called from get_current_scan_type, and is useful when the scan_type depends on the buffer state. Signed-off-by: Jorge Marques <[email protected]>
Add dt-bindings for AD4052 family, devices AD4050/AD4052/AD4056/AD4058, low-power with monitor capabilities SAR ADCs. Each variant of the family differs in speed and resolution, resulting in different scan types and spi word sizes, that are matched by the compatible with the chip_info. The device conatins one input (cnv) and two outputs (gp0, gp1). Signed-off-by: Jorge Marques <[email protected]>
The AD4052 CNV pin is driven by a GPIO for single shot readings and by a PWM for buffer readings. The functional-mode entry allows to set Sample Mode (0) or Burst Averaging Mode (1). During runtime, it is possible to enter Trigger Mode through IIO Events. Signed-off-by: Jorge Marques <[email protected]>
This adds a new page to document how to use the ad4052 ADC driver. Signed-off-by: Jorge Marques <[email protected]>
The AD4052/AD4058/AD4050/AD4056 are versatile, 16-bit/12-bit, successive approximation register (SAR) analog-to-digital converter (ADC) that enables low-power, high-density data acquisition solutions without sacrificing precision. This ADC offers a unique balance of performance and power efficiency, plus innovative features for seamlessly switching between high-resolution and low-power modes tailored to the immediate needs of the system. The AD4052/AD4058/AD4050/AD4056 are ideal for battery-powered, compact data acquisition and edge sensing applications. Signed-off-by: Jorge Marques <[email protected]>
Add entry for the AD4052 ADC family driver. Signed-off-by: Jorge Marques <[email protected]>
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PR Description
Add:
Optional:
Features:
Overall, the highlight of this device is the monitor capability, leveraged by the autonomous trigger mode and exposed as IIO Event.
Linux driver doc:
HDL: analogdevicesinc/hdl#1504
Datasheet: www.analog.com/ad4052
Tested on Coraz7s
PR Type
PR Checklist