at32uc3a0: Initial work for SimpleMachines' Mizar32-A

arch/avr/src/at32uc3/Kconfig

@@ -10,6 +10,11 @@ choice
 	prompt "AT32U3 Processor Selection"
 	default ARCH_CHIP_AT32UC3B0256
 
+config ARCH_CHIP_AT32UC3A0512
+	bool "AT32UC3A0512"
+	select ARCH_CHIP_AT32UC3A
+	select ARCH_CHIP_AT32UC3A0
+
 config ARCH_CHIP_AT32UC3B064
 	bool "AT32UC3B064"
 	select ARCH_CHIP_AT32UC3B

arch/avr/src/at32uc3/at32uc3_clkinit.c

@@ -212,11 +212,13 @@ static inline void up_enableosc1(void)
 #ifdef AVR32_CLOCK_PLL0
 static inline void up_enablepll0(void)
 {
+  uint32_t regval;
+
   /* Setup PLL0 */
 
   regval = (AVR32_PLL0_DIV << PM_PLL_PLLDIV_SHIFT) |
            (AVR32_PLL0_MUL << PM_PLL_PLLMUL_SHIFT) |
-           (16 << PM_PLL_PLLCOUNT_SHIFT)
+           (16 << PM_PLL_PLLCOUNT_SHIFT);
 
   /* Select PLL0/1 oscillator */
 
@@ -229,7 +231,7 @@ static inline void up_enablepll0(void)
   /* Set PLL0 options */
 
   regval = getreg32(AVR32_PM_PLL0);
-  regval &= ~PM_PLL_PLLOPT_MASK
+  regval &= ~PM_PLL_PLLOPT_MASK;
 #if AVR32_PLL0_FREQ < 160000000
   regval |= PM_PLL_PLLOPT_VCO;
 #endif
@@ -239,13 +241,13 @@ static inline void up_enablepll0(void)
 #if AVR32_PLL0_WBWM != 0
   regval |= PM_PLL_PLLOPT_WBWDIS;
 #endif
-  putreg32(regval, AVR32_PM_PLL0)
+  putreg32(regval, AVR32_PM_PLL0);
 
   /* Enable PLL0 */
 
   regval = getreg32(AVR32_PM_PLL0);
   regval |= PM_PLL_PLLEN;
-  putreg32(regval, AVR32_PM_PLL0)
+  putreg32(regval, AVR32_PM_PLL0);
 
   /* Wait for PLL0 locked. */
 
@@ -268,7 +270,7 @@ static inline void up_enablepll1(void)
 
   regval = (AVR32_PLL1_DIV << PM_PLL_PLLDIV_SHIFT) |
            (AVR32_PLL1_MUL << PM_PLL_PLLMUL_SHIFT) |
-           (16 << PM_PLL_PLLCOUNT_SHIFT)
+           (16 << PM_PLL_PLLCOUNT_SHIFT);
 
   /* Select PLL0/1 oscillator */
 
@@ -281,7 +283,7 @@ static inline void up_enablepll1(void)
   /* Set PLL1 options */
 
   regval = getreg32(AVR32_PM_PLL1);
-  regval &= ~PM_PLL_PLLOPT_MASK
+  regval &= ~PM_PLL_PLLOPT_MASK;
 #if AVR32_PLL1_FREQ < 160000000
   regval |= PM_PLL_PLLOPT_VCO;
 #endif
@@ -291,13 +293,13 @@ static inline void up_enablepll1(void)
 #if AVR32_PLL1_WBWM != 0
   regval |= PM_PLL_PLLOPT_WBWDIS;
 #endif
-  putreg32(regval, AVR32_PM_PLL1)
+  putreg32(regval, AVR32_PM_PLL1);
 
   /* Enable PLL1 */
 
   regval = getreg32(AVR32_PM_PLL1);
   regval |= PM_PLL_PLLEN;
-  putreg32(regval, AVR32_PM_PLL1)
+  putreg32(regval, AVR32_PM_PLL1);
 
   /* Wait for PLL1 locked. */
 
@@ -319,22 +321,22 @@ static inline void up_clksel(void)
 
 #if AVR32_CKSEL_CPUDIV != 0
   regval |= PM_CKSEL_CPUDIV;
-  regval |= (AVR32_CKSEL_CPUDIV << PM_CKSEL_CPUSEL_SHIFT)
+  regval |= (AVR32_CKSEL_CPUDIV << PM_CKSEL_CPUSEL_SHIFT);
 #endif
 
 #if AVR32_CKSEL_HSBDIV != 0
   regval |= PM_CKSEL_HSBDIV;
-  regval |= (AVR32_CKSEL_HSBDIV << PM_CKSEL_HSBSEL_SHIFT)
+  regval |= (AVR32_CKSEL_HSBDIV << PM_CKSEL_HSBSEL_SHIFT);
 #endif
 
 #if AVR32_CKSEL_PBADIV != 0
   regval |= PM_CKSEL_PBADIV;
-  regval |= (AVR32_CKSEL_PBADIV << PM_CKSEL_PBASEL_SHIFT)
+  regval |= (AVR32_CKSEL_PBADIV << PM_CKSEL_PBASEL_SHIFT);
 #endif
 
 #if AVR32_CKSEL_PBBDIV != 0
   regval |= PM_CKSEL_PBBDIV;
-  regval |= (AVR32_CKSEL_PBBDIV << PM_CKSEL_PBBSEL_SHIFT)
+  regval |= (AVR32_CKSEL_PBBDIV << PM_CKSEL_PBBSEL_SHIFT);
 #endif
 
   putreg32(regval, AVR32_PM_CKSEL);
@@ -411,13 +413,13 @@ static inline void up_usbclock(void)
   u_avr32_pm_gcctrl.GCCTRL.diven  = diven;
   u_avr32_pm_gcctrl.GCCTRL.div    = div;
 #endif
-  putreg32(regval, AVR32_PM_GCCTRL(AVR32_PM_GCLK_USBB))
+  putreg32(regval, AVR32_PM_GCCTRL(AVR32_PM_GCLK_USBB));
 
   /* Enable USB GCLK */
 
-  regval = getreg32(AVR32_PM_GCCTRL(AVR32_PM_GCLK_USBB))
+  regval = getreg32(AVR32_PM_GCCTRL(AVR32_PM_GCLK_USBB));
   regval |= PM_GCCTRL_CEN;
-  putreg32(regval, AVR32_PM_GCCTRL(AVR32_PM_GCLK_USBB))
+  putreg32(regval, AVR32_PM_GCCTRL(AVR32_PM_GCLK_USBB));
 }
 #endif
 

arch/avr/src/at32uc3/at32uc3_gpio.c

@@ -66,13 +66,13 @@ static uint32_t g_portmap[AVR32_NGPIO_PORTS] =
   AVR32_GPIO0_BASE
 #endif
 #if AVR32_NGPIO > 32
-  , AVR32_GPIO1_BASE,
+  , AVR32_GPIO1_BASE
 #endif
 #if AVR32_NGPIO > 64
-  , AVR32_GPIO2_BASE,
+  , AVR32_GPIO2_BASE
 #endif
 #if AVR32_NGPIO > 96
-  , AVR32_GPIO3_BASE,
+  , AVR32_GPIO3_BASE
 #endif
 #if AVR32_NGPIO > 128
   , AVR32_GPIO4_BASE,

arch/avr/src/at32uc3/at32uc3_lowconsole.c

@@ -348,11 +348,18 @@ void up_consoleinit(void)
 
 #endif
 
-  /* Enable selected clocks (and disabled unselected clocks) */
+  /* Enable selected clocks (and disable unselected clocks) */
 
   regval = getreg32(AVR32_PM_PBAMASK);
+#ifdef CONFIG_ARCH_CHIP_AT32UC3B
   regval &= ~(PM_PBAMASK_USART0 | PM_PBAMASK_USART1 | PM_PBAMASK_USART2);
   regval |= pbamask;
+#else
+
+  /* In the case of Mizar32, enable all USART clocks. */
+
+  regval |= PM_PBAMASK_USART0 | PM_PBAMASK_USART1 | PM_PBAMASK_USART2;
+#endif
   putreg32(regval, AVR32_PM_PBAMASK);
 
   /* Then configure the console here (if it is not going to be configured

arch/avr/src/at32uc3/at32uc3a_pinmux.h

@@ -31,7 +31,8 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#warning "Not Implemented"
+#define PINMUX_USART1_RXD_0        (GPIO_PERIPH | GPIO_FUNCA | GPIO_PORTA | 5)
+#define PINMUX_USART1_TXD_0        (GPIO_PERIPH | GPIO_FUNCA | GPIO_PORTA | 6)
 
 /****************************************************************************
  * Public Types
@@ -45,4 +46,4 @@
  * Public Functions Prototypes
  ****************************************************************************/
 
-#endif /* __ARCH_AVR_SRC_AT32UC3_AT32UC3_PINMUX_H */
+#endif /* __ARCH_AVR_SRC_AT32UC3_AT32UC3A_PINMUX_H */

arch/avr/src/at32uc3/chip.h

@@ -27,6 +27,12 @@
 
 #include <nuttx/config.h>
 
+/* Include only the memory map.  Other chip hardware files should then
+ * include this file for the proper setup
+ */
+
+#include "at32uc3_memorymap.h"
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -35,11 +41,30 @@
 
 /* UC3 A0/A1 Series */
 
+#if defined (CONFIG_ARCH_CHIP_AT32UC3A0512)
+#  define CONFIG_ARCH_CHIP_AT32UC3A  1            /* UC3 A series */
+#  define CONFIG_ARCH_CHIP_AT32UC3A0 1            /* UC3 A0 (144-pin) series */
+#  define AVR32_ONCHIP_FLASH_SIZE    (512*1024)   /* Size of on-chip FLASH (bytes) */
+#  define AVR32_ONCHIP_SRAM_SIZE     (64*1024)    /* Size of on-chip SRAM (bytes) */
+#  define AVR32_USB_FULLSPEED        1            /* USB full-speed support */
+#  define AVR32_USB_HOST             1            /* USB host support (OTG) */
+#  define AVR32_USB_DEVICE           1            /* USB device support */
+#  define AVR32_NUSART               4            /* Number of USARTs */
+#  define AVR32_NSPI                 2            /* Number of SPI */
+#  define AVR32_NTWI                 1            /* Number of TWI (I2C) */
+#  define AVR32_NSSC                 1            /* Number of SSC (I2S audio) */
+#  define AVR32_NGPIO                66           /* Number of GPIO pins */
+#  define AVR32_NTIMER               1            /* Number of Timers */
+#  define AVR32_NPWM                 7            /* Number of PWM channels */
+#  define AVR32_NOSC                 1            /* Number of crystal oscillators */
+#  define AVR32_NADC10               8            /* Number of 10-bit A/D channels */
+#  define AVR32_NDMAC                1            /* Number of DMA channels */
+
 /* UC3 A2/A3 Series */
 
 /* UC3 B0 (64-pin) / B1 (48-pin, no USB host) Series */
 
-#ifdef CONFIG_ARCH_CHIP_AT32UC3B064
+#elif defined(CONFIG_ARCH_CHIP_AT32UC3B064)
 #  define CONFIG_ARCH_CHIP_AT32UC3B  1            /* UC3 B series */
 #  define CONFIG_ARCH_CHIP_AT32UC3B0 1            /* UC3 B0 (64-pin) series */
 #  define AVR32_ONCHIP_FLASH_SIZE    (64*1024)    /* Size of on-chip FLASH (bytes) */
@@ -187,12 +212,6 @@
 #  error "Unsupported AVR32 chip"
 #endif
 
-/* Include only the memory map.  Other chip hardware files should then
- * include this file for the proper setup
- */
-
-#include "at32uc3_memorymap.h"
-
 /****************************************************************************
  * Public Types
  ****************************************************************************/

boards/Kconfig

@@ -1057,6 +1057,15 @@ config ARCH_BOARD_MISOC_VERILATOR
 	---help---
 		This configuration is port to NuttX running on Verilator.
 
+config ARCH_BOARD_MIZAR32A
+	bool "Mizar32-A"
+	depends on ARCH_CHIP_AT32UC3A0512
+	select ARCH_HAVE_LEDS
+	---help---
+                This is a port of NuttX for the Mizar32-A board designed by SimpleMachines,
+                Italy. The board is based on the AT32UC3A0512 MCU and uses avr32-gcc
+                version 4.4.7 for its build on GNU/Linux.
+
 config ARCH_BOARD_MOTEINO_MEGA
 	bool "LowPowerLab MoteinoMEGA"
 	depends on ARCH_CHIP_ATMEGA1284P
@@ -3194,6 +3203,7 @@ config ARCH_BOARD
 	default "micropendous3"             if ARCH_BOARD_MICROPENDOUS3
 	default "mirtoo"                    if ARCH_BOARD_MIRTOO
 	default "misoc"                     if ARCH_BOARD_MISOC_QEMU || ARCH_BOARD_MISOC_VERILATOR
+	default "mizar32a"                  if ARCH_BOARD_MIZAR32A
 	default "moteino-mega"              if ARCH_BOARD_MOTEINO_MEGA
 	default "ne64badge"                 if ARCH_BOARD_NE64BADGE
 	default "nrf52-feather"             if ARCH_BOARD_NRF52_FEATHER
@@ -4118,6 +4128,9 @@ endif
 if ARCH_BOARD_AVR32DEV1
 source "boards/avr/at32uc3/avr32dev1/Kconfig"
 endif
+if ARCH_BOARD_MIZAR32A
+source "boards/avr/at32uc3/mizar32a/Kconfig"
+endif
 if ARCH_BOARD_MEGA1284P_XPLAINED
 source "boards/avr/atmega/mega1284p-xplained/Kconfig"
 endif

boards/avr/at32uc3/mizar32a/Kconfig

@@ -0,0 +1,7 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_MIZAR32A
+endif

boards/avr/at32uc3/mizar32a/configs/nsh/defconfig

@@ -0,0 +1,39 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_ARCH="avr"
+CONFIG_ARCH_AVR=y
+CONFIG_ARCH_BOARD="mizar32a"
+CONFIG_ARCH_BOARD_MIZAR32A=y
+CONFIG_ARCH_CHIP="at32uc3"
+CONFIG_ARCH_CHIP_AT32UC3=y
+CONFIG_ARCH_CHIP_AT32UC3A0512=y
+CONFIG_ARCH_CHIP_AT32UC3A=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_AVR32_GPIOIRQ=y
+CONFIG_AVR32_GPIOIRQSETA=0
+CONFIG_AVR32_GPIOIRQSETB=0x0000000c
+CONFIG_AVR32_USART1=y
+CONFIG_BOARD_LOOPSPERMSEC=1140
+CONFIG_ENDIAN_BIG=y
+CONFIG_FS_FAT=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=65536
+CONFIG_RAM_START=0x00000004
+CONFIG_START_DAY=2
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2010
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART1_SERIAL_CONSOLE=y