xtensa/esp32s2: Add RTC support

apache · Dec 1, 2023 · 5b19d8b · 5b19d8b
1 parent 31abcb0
commit 5b19d8b
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diff --git a/Documentation/platforms/xtensa/esp32s2/boards/esp32s2-kaluga-1/index.rst b/Documentation/platforms/xtensa/esp32s2/boards/esp32s2-kaluga-1/index.rst
@@ -297,6 +297,22 @@ After successfully built and flashed, run on the boards' terminal::
 
     nxlooper> loopback 2 8 44100
 
+rtc
+---
+
+This configuration demonstrates the use of the RTC driver through alarms.
+You can set an alarm, check its progress and receive a notification after it expires::
+
+    nsh> alarm 10
+    alarm_daemon started
+    alarm_daemon: Running
+    Opening /dev/rtc0
+    Alarm 0 set in 10 seconds
+    nsh> alarm -r
+    Opening /dev/rtc0
+    Alarm 0 is active with 10 seconds to expiration
+    nsh> alarm_daemon: alarm 0 received
+
 twai
 ----
 

diff --git a/Documentation/platforms/xtensa/esp32s2/boards/esp32s2-saola-1/index.rst b/Documentation/platforms/xtensa/esp32s2/boards/esp32s2-saola-1/index.rst
@@ -335,6 +335,22 @@ To test it, just run ``rand`` to get 32 randomly generated bytes::
     0000  98 b9 66 a2 a2 c0 a2 ae 09 70 93 d1 b5 91 86 c8  ..f......p......
     0010  8f 0e 0b 04 29 64 21 72 01 92 7c a2 27 60 6f 90  ....)d!r..|.'`o.
 
+rtc
+---
+
+This configuration demonstrates the use of the RTC driver through alarms.
+You can set an alarm, check its progress and receive a notification after it expires::
+
+    nsh> alarm 10
+    alarm_daemon started
+    alarm_daemon: Running
+    Opening /dev/rtc0
+    Alarm 0 set in 10 seconds
+    nsh> alarm -r
+    Opening /dev/rtc0
+    Alarm 0 is active with 10 seconds to expiration
+    nsh> alarm_daemon: alarm 0 received
+
 timer
 -----
 

diff --git a/arch/xtensa/src/esp32s2/Kconfig b/arch/xtensa/src/esp32s2/Kconfig
@@ -420,6 +420,10 @@ config ESP32S2_RWDT
 		to have the RTC module reset, please, use the Timers' Module WDTs.
 		They will only reset Main System.
 
+config ESP32S2_RTC
+	bool "Real Time Clock (RTC)"
+	default y
+
 config ESP32S2_UART0
 	bool "UART 0"
 	default n
@@ -1020,6 +1024,49 @@ config ESP32S2_SPIRAM_IGNORE_NOTFOUND
 
 endmenu # SPI RAM Configuration
 
+menu "RTC Configuration"
+	depends on ESP32S2_RTC
+
+choice ESP32S2_RTC_CLK_SRC
+	prompt "RTC clock source"
+	default ESP32S2_RTC_CLK_INT_RC
+	---help---
+		Choose which clock is used as RTC clock source.
+
+		- "Internal 90KHz oscillator" option provides lowest deep sleep current
+			consumption, and does not require extra external components. However
+			frequency stability with respect to temperature is poor, so time may
+			drift in deep/light sleep modes.
+		- "External 32KHz crystal" provides better frequency stability, at the
+			expense of slightly higher (1uA) deep sleep current consumption.
+		- "External 32KHz oscillator" allows using 32KHz clock generated by an
+			external circuit. In this case, external clock signal must be connected
+			to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
+			and <1V in case of square wave signal. Common mode voltage should be
+			0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
+			Additionally, 1nF capacitor must be connected between 32K_XP pin and
+			ground. 32K_XP pin can not be used as a GPIO in this case.
+		- "Internal 8.5MHz oscillator divided by 256" option results in higher
+			deep sleep current (by 5uA) but has better frequency stability than
+			the internal 90KHz oscillator. It does not require external components.
+
+config ESP32S2_RTC_CLK_INT_RC
+	bool "Internal 90KHz RC oscillator"
+
+config ESP32S2_RTC_CLK_EXT_XTAL
+	bool "External 32KHz crystal"
+	select ESP_SYSTEM_RTC_EXT_XTAL
+
+config ESP32S2_RTC_CLK_EXT_OSC
+	bool "External 32KHz oscillator at 32K_XN pin"
+	select ESP_SYSTEM_RTC_EXT_XTAL
+
+config ESP32S2_RTC_CLK_INT_8MD256
+	bool "Internal 8.5MHz oscillator, divided by 256 (~33kHz)"
+
+endchoice
+endmenu # "RTC Configuration"
+
 menu "Real-Time Timer Configuration"
 	depends on ESP32S2_RT_TIMER
 

diff --git a/arch/xtensa/src/esp32s2/Make.defs b/arch/xtensa/src/esp32s2/Make.defs
@@ -137,6 +137,12 @@ CHIP_CSRCS += esp32s2_spiram.c
 CHIP_CSRCS += esp32s2_psram.c
 endif
 
+CHIP_CSRCS += esp32s2_rtc.c
+
+ifeq ($(CONFIG_RTC_DRIVER),y)
+CHIP_CSRCS += esp32s2_rtc_lowerhalf.c
+endif
+
 #############################################################################
 # Espressif HAL for 3rd Party Platforms
 #############################################################################