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Update README.md
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briansune authored Jan 22, 2024
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# Delta-Sigma-DAC-Verilog

## If this project is constructive, welcome to donate a drink to PayPal.

<img src="https://github.com/briansune/FPGA-Camera-MIPI-DVP-Verilog/assets/29487339/75ccc568-4f17-48a1-b2af-20211f98896c" style="height:20%; width:20%">

## The measurements are conducted on Spartan 7 Xilinx FPGA with LPF setting - (680R, 1nF).

## Common questions:
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